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fix gregs complaints :)
[cc65] / asminc / pce.inc
1 ;
2 ; PCE definitions. By Groepaz/Hitmem.
3 ;
4
5 ; FIXME: optimize zeropage usage
6 CURS_X          = $30
7 CURS_Y          = $31
8 SCREEN_PTR      = $32           ;2
9 CHARCOLOR       = $34
10 RVS             = $35
11 BGCOLOR         = $36
12 tickcount       = $37           ;4
13
14 ; FIXME: screen dimensions my change according to selected video mode
15 screenrows      = (224/8)
16 charsperline    = 61
17
18 CH_HLINE        = 1
19 CH_VLINE        = 2
20
21 ; huc6270 - Video Display Controller (vdc)
22
23 VDC_MAWR        = 0             ; Memory Address Write Register
24 VDC_MARR        = 1             ; Memory Address Read Register
25 VDC_VWR         = 2             ; VRAM Write Register
26 VDC_VRR         = 3             ; VRAM Read Register
27 VDC_CR          = 4             ; Control Register
28 VDC_RCR         = 5             ; Raster Counter Register
29 VDC_BXR         = 6             ; Background X-Scroll Register
30 VDC_BYR         = 7             ; Background Y-Scroll Register
31 VDC_MWR         = 8             ; Memory-access Width Register
32 VDC_HSR         = 9             ; Horizontal Sync Register (?)
33 VDC_HDR         = 10            ; Horizontal Display Register (?)
34 VDC_VPR         = 11            ; (unknown)
35 VDC_VDW         = 12            ; (unknown use)
36 VDC_VCR         = 13            ; (unknown use)
37 VDC_DCR         = 14            ; (DMA) Control Register
38 VDC_SOUR        = 15            ; (DMA) Source Register
39 VDC_DESR        = 16            ; (DMA) Destination Register
40 VDC_LENR        = 17            ; (DMA) Length Register
41 VDC_SATB        = 18            ; Sprite Attribute Table
42
43 ; VDC port
44 ; Note: absolute addressing mode must be used when writing to this port
45
46 VDC_CTRL        = $0000
47 VDC_DATA_LO     = $0002
48 VDC_DATA_HI     = $0003
49
50 ; huc6260 - Video Color Encoder (vce)
51
52 ; The DAC has a palette of 512 colours.
53 ; bitmap of the palette data is this: 0000000gggrrrbbb.
54 ; You can read and write the DAC-registers.
55
56 VCE             = $0400         ; base
57
58 VCE_CTRL        = $0400         ; write$00 to reset
59 VCE_ADDR_LO     = $0402         ; LSB of byte offset into palette
60 VCE_ADDR_HI     = $0403         ; MSB of byte offset into palette
61 VCE_DATA_LO     = $0404         ; LSB of 16-bit palette data
62 VCE_DATA_HI     = $0405         ; MSB of 16-bit palette data
63
64 ; programmable sound generator (PSG)
65
66 PSG             = $0800         ; base
67
68 PSG_CHAN_SELECT = $0800
69 PSG_GLOBAL_PAN  = $0801
70 PSG_FREQ_LO     = $0802
71 PSG_FREQ_HI     = $0803
72 PSG_CHAN_CTRL   = $0804
73 PSG_CHAN_PAN    = $0805
74 PSG_CHAN_DATA   = $0806
75 PSG_NOISE       = $0807
76 PSG_LFO_FREQ    = $0808
77 PSG_LFO_CTRL    = $0809
78
79 ; timer
80
81 TIMER           = $0c00         ; base
82
83 TIMER_COUNT     = $0c00
84 TIMER_CTRL      = $0c01
85
86 JOY_CTRL        = $1000
87
88 IRQ_MASK        = $1402
89 IRQ_STATUS      = $1403
90
91 CDR_MEM_DISABLE = $1803
92 CDR_MEM_ENABLE  = $1807
93
94 ; Write VDC register
95 .macro VREG arg1,arg2
96         st0     #arg1
97         st1     #<(arg2)
98         st2     #>(arg2)
99 .endmacro