2 * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
5 * Marvell Semiconductor <www.marvell.com>
6 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/orion5x.h>
14 #include "../common/common.h"
16 DECLARE_GLOBAL_DATA_PTR;
19 * The ED Mini V2 is equipped with a Macronix MXLV400CB FLASH
20 * which CFI does not properly detect, hence the LEGACY config.
22 #if defined(CONFIG_FLASH_CFI_LEGACY)
24 ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
26 int sectsz[] = CONFIG_SYS_FLASH_SECTSZ;
29 if (base != CONFIG_SYS_FLASH_BASE)
33 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
34 /* set each sector's start address and size based */
35 for (sect = 0; sect < CONFIG_SYS_MAX_FLASH_SECT; sect++) {
36 info->start[sect] = base+info->size;
37 info->size += sectsz[sect];
39 /* This flash must be accessed in 8-bits mode, no buffer. */
40 info->flash_id = 0x01000000;
41 info->portwidth = FLASH_CFI_8BIT;
42 info->chipwidth = FLASH_CFI_BY8;
43 info->buffer_size = 0;
44 /* timings are derived from the Macronix datasheet. */
45 info->erase_blk_tout = 1000;
46 info->write_tout = 10;
47 info->buffer_write_tout = 300;
48 /* Commands and addresses are for AMD mode 8-bit access. */
49 info->vendor = CFI_CMDSET_AMD_LEGACY;
50 info->cmd_reset = 0xF0;
51 info->interface = FLASH_CFI_X8;
52 info->legacy_unlock = 0;
54 info->addr_unlock1 = 0x00000aaa;
55 info->addr_unlock2 = 0x00000555;
56 /* Manufacturer Macronix, device MX29LV400CB, CFI 1.3. */
57 info->manufacturer_id = 0x22;
58 info->device_id = 0xBA;
60 info->cfi_version = 0x3133;
61 info->cfi_offset = 0x0000;
62 info->name = "MX29LV400CB";
66 #endif /* CONFIG_SYS_FLASH_CFI */
70 /* arch number of board */
71 gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
73 /* boot parameter start at 256th byte of RAM base */
74 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
79 #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
80 /* Configure and enable MV88E1116 PHY */
83 mv_phy_88e1116_init("egiga0", 8);
85 #endif /* CONFIG_RESET_PHY_R */