3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
7 * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
8 * extra improvments by Brain Waite
14 #include "../include/mv_gen_reg.h"
15 #include "../include/core.h"
17 #define MAX_I2C_RETRYS 10
18 #define I2C_DELAY 1000 /* Should be at least the # of MHz of Tclk */
28 /* Assuming that there is only one master on the bus (us) */
30 void i2c_init (int speed, int slaveaddr)
32 unsigned int n, m, freq, margin, power;
33 unsigned int actualN = 0, actualM = 0;
34 unsigned int control, status;
35 unsigned int minMargin = 0xffffffff;
36 unsigned int tclk = CONFIG_SYS_TCLK;
37 unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
39 DP (puts ("i2c_init\n"));
41 for (n = 0; n < 8; n++) {
42 for (m = 0; m < 16; m++) {
43 power = 2 << n; /* power = 2^(n+1) */
44 freq = tclk / (10 * (m + 1) * power);
46 margin = i2cFreq - freq;
48 margin = freq - i2cFreq;
49 if (margin < minMargin) {
57 DP (puts ("setup i2c bus\n"));
61 GT_REG_WRITE (I2C_SOFT_RESET, 0);
63 DP (puts ("udelay...\n"));
67 DP (puts ("set baudrate\n"));
69 GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
70 GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
72 udelay (I2C_DELAY * 10);
74 DP (puts ("read control, baudrate\n"));
76 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
77 GT_REG_READ (I2C_CONTROL, &control);
80 static uchar i2c_start (void)
81 { /* DB64360 checked -> ok */
82 unsigned int control, status;
85 DP (puts ("i2c_start\n"));
87 /* Set the start bit */
89 /* gtI2cGenerateStartBit() */
91 GT_REG_READ (I2C_CONTROL, &control);
92 control |= (0x1 << 5); /* generate the I2C_START_BIT */
93 GT_REG_WRITE (I2C_CONTROL, control);
95 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
98 while ((status & 0xff) != 0x08) {
101 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
104 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
111 static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
113 unsigned int status, data, bits = 7;
116 DP (puts ("i2c_select_device\n"));
118 /* Output slave address */
124 data = (dev_addr << 1);
125 /* set the read bit */
127 GT_REG_WRITE (I2C_DATA, data);
128 /* assert the address */
129 RESET_REG_BITS (I2C_CONTROL, BIT3);
133 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
135 while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
138 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
141 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
146 printf ("10 bit I2C addressing not yet implemented\n");
153 static uchar i2c_get_data (uchar * return_data, int len)
156 unsigned int data, status = 0;
159 DP (puts ("i2c_get_data\n"));
163 /* Get and return the data */
165 RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
167 udelay (I2C_DELAY * 5);
169 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
171 while ((status & 0xff) != 0x50) {
174 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
177 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
180 GT_REG_READ (I2C_DATA, &data);
182 *return_data = (uchar) data;
185 RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
186 while ((status & 0xff) != 0x58) {
189 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
192 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
195 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
200 static uchar i2c_write_data (unsigned int *data, int len)
205 unsigned int *temp_ptr = data;
207 DP (puts ("i2c_write_data\n"));
210 temp = (unsigned int) (*temp_ptr);
211 GT_REG_WRITE (I2C_DATA, temp);
212 RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
216 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
218 while ((status & 0xff) != 0x28) {
221 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
224 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
230 /* 11-14-2002 Paul Marchese */
231 /* Can't have the write issuing a stop command */
232 /* it's wrong to have a stop bit in read stream or write stream */
233 /* since we don't know if it's really the end of the command */
234 /* or whether we have just send the device address + offset */
235 /* we will push issuing the stop command off to the original */
236 /* calling function */
237 /* set the interrupt bit in the control register */
238 GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
239 udelay (I2C_DELAY * 10);
243 /* 11-14-2002 Paul Marchese */
244 /* created this function to get the i2c_write() */
245 /* function working properly. */
246 /* function to write bytes out on the i2c bus */
247 /* this is identical to the function i2c_write_data() */
248 /* except that it requires a buffer that is an */
249 /* unsigned character array. You can't use */
250 /* i2c_write_data() to send an array of unsigned characters */
251 /* since the byte of interest ends up on the wrong end of the bus */
252 /* aah, the joys of big endian versus little endian! */
254 /* returns 0 = success */
255 /* anything other than zero is failure */
256 static uchar i2c_write_byte (unsigned char *data, int len)
261 unsigned char *temp_ptr = data;
263 DP (puts ("i2c_write_byte\n"));
266 /* Set and assert the data */
268 GT_REG_WRITE (I2C_DATA, temp);
269 RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
273 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
275 while ((status & 0xff) != 0x28) {
278 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
281 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
287 /* Can't have the write issuing a stop command */
288 /* it's wrong to have a stop bit in read stream or write stream */
289 /* since we don't know if it's really the end of the command */
290 /* or whether we have just send the device address + offset */
291 /* we will push issuing the stop command off to the original */
292 /* calling function */
293 /* GT_REG_WRITE(I2C_CONTROL, (0x1 << 3) | (0x1 << 4));
294 GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); */
295 /* set the interrupt bit in the control register */
296 GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
297 udelay (I2C_DELAY * 10);
303 i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
307 unsigned int table[2];
309 /* initialize the table of address offset bytes */
310 /* utilized for 2 byte address offsets */
311 /* NOTE: the order is high byte first! */
312 table[1] = offset & 0xff; /* low byte */
313 table[0] = offset / 0x100; /* high byte */
315 DP (puts ("i2c_set_dev_offset\n"));
317 status = i2c_select_device (dev_addr, 0, ten_bit);
320 printf ("Failed to select device setting offset: 0x%02x\n",
325 /* check the address offset length */
327 /* no address offset */
329 else if (alen == 1) {
330 /* 1 byte address offset */
331 status = i2c_write_data (&offset, 1);
334 printf ("Failed to write data: 0x%02x\n", status);
338 } else if (alen == 2) {
339 /* 2 bytes address offset */
340 status = i2c_write_data (table, 2);
343 printf ("Failed to write data: 0x%02x\n", status);
348 /* address offset unknown or not supported */
349 printf ("Address length offset %d is not supported\n", alen);
352 return 0; /* sucessful completion */
356 i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
360 unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
362 DP (puts ("i2c_read\n"));
364 /* set the i2c frequency */
365 i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
367 status = i2c_start ();
371 printf ("Transaction start failed: 0x%02x\n", status);
376 status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
379 printf ("Failed to set slave address & offset: 0x%02x\n",
385 /* set the i2c frequency again */
386 i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
388 status = i2c_start ();
391 printf ("Transaction restart failed: 0x%02x\n", status);
396 status = i2c_select_device (dev_addr, 1, 0); /* send the slave address */
399 printf ("Address not acknowledged: 0x%02x\n", status);
404 status = i2c_get_data (data, len);
407 printf ("Data not received: 0x%02x\n", status);
415 /* 11-14-2002 Paul Marchese */
416 /* Function to set the I2C stop bit */
419 GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
422 /* 11-14-2002 Paul Marchese */
423 /* I2C write function */
424 /* dev_addr = device address */
425 /* offset = address offset */
426 /* alen = length in bytes of the address offset */
427 /* data = pointer to buffer to read data into */
428 /* len = # of bytes to read */
430 /* returns 0 = succesful */
431 /* anything but zero is failure */
433 i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
437 unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
439 DP (puts ("i2c_write\n"));
441 /* set the i2c frequency */
442 i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
444 status = i2c_start (); /* send a start bit */
448 printf ("Transaction start failed: 0x%02x\n", status);
453 status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
456 printf ("Failed to set slave address & offset: 0x%02x\n",
463 status = i2c_write_byte (data, len); /* write the data */
466 printf ("Data not written: 0x%02x\n", status);
470 /* issue a stop bit */
475 /* 11-14-2002 Paul Marchese */
476 /* function to determine if an I2C device is present */
477 /* chip = device address of chip to check for */
479 /* returns 0 = sucessful, the device exists */
480 /* anything other than zero is failure, no device */
481 int i2c_probe (uchar chip)
484 /* We are just looking for an <ACK> back. */
485 /* To see if the device/chip is there */
488 unsigned int i2c_status;
491 unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
493 DP (puts ("i2c_probe\n"));
495 /* set the i2c frequency */
496 i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
498 status = i2c_start (); /* send a start bit */
502 printf ("Transaction start failed: 0x%02x\n", status);
507 status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
510 printf ("Failed to set slave address: 0x%02x\n", status);
515 GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
516 printf ("address %#x returned %#x\n", chip, i2c_status);
518 /* issue a stop bit */
520 return 0; /* successful completion */