3 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 * Kenati Technologies, Inc.
8 * board/MigoR/lowlevel_init.S
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/processor.h>
32 * Board specific low level init code, called _very_ early in the
33 * startup sequence. Relocation to SDRAM has not happened yet, no
34 * stack is available, bss section has not been initialised, etc.
36 * (Note: As no stack is available, no subroutines can be called...).
46 mov.l CCR_A, r1 ! Address of Cache Control Register
47 mov.l CCR_D, r0 ! Instruction Cache Invalidate
50 mov.l MMUCR_A, r1 ! Address of MMU Control Register
51 mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
54 mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
58 mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
78 mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
79 mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
82 mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
83 mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
86 mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
87 mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
90 mov.l DLLFRQ_A, r1 ! 20080115
91 mov.l DLLFRQ_D, r0 ! 20080115
94 mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
95 mov.l FRQCR_D, r0 ! 20080115
98 mov.l CCR_A, r1 ! Address of Cache Control Register
99 mov.l CCR_D_2, r0 ! ??
104 mov.l CMNCR_A, r1 ! CMNCR address -> R1
105 mov.l CMNCR_D, r0 ! CMNCR data -> R0
106 mov.l r0, @r1 ! CMNCR set
108 mov.l CS0BCR_A, r1 ! CS0BCR address -> R1
109 mov.l CS0BCR_D, r0 ! CS0BCR data -> R0
110 mov.l r0, @r1 ! CS0BCR set
112 mov.l CS4BCR_A, r1 ! CS4BCR address -> R1
113 mov.l CS4BCR_D, r0 ! CS4BCR data -> R0
114 mov.l r0, @r1 ! CS4BCR set
116 mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1
117 mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0
118 mov.l r0, @r1 ! CS5ABCR set
120 mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1
121 mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0
122 mov.l r0, @r1 ! CS5BBCR set
124 mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1
125 mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0
126 mov.l r0, @r1 ! CS6ABCR set
128 mov.l CS0WCR_A, r1 ! CS0WCR address -> R1
129 mov.l CS0WCR_D, r0 ! CS0WCR data -> R0
130 mov.l r0, @r1 ! CS0WCR set
132 mov.l CS4WCR_A, r1 ! CS4WCR address -> R1
133 mov.l CS4WCR_D, r0 ! CS4WCR data -> R0
134 mov.l r0, @r1 ! CS4WCR set
136 mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1
137 mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0
138 mov.l r0, @r1 ! CS5AWCR set
140 mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1
141 mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0
142 mov.l r0, @r1 ! CS5BWCR set
144 mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1
145 mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0
146 mov.l r0, @r1 ! CS6AWCR set
148 ! SDRAM initialization
149 mov.l SDCR_A, r1 ! SB_SDCR address -> R1
150 mov.l SDCR_D, r0 ! SB_SDCR data -> R0
151 mov.l r0, @r1 ! SB_SDCR set
153 mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1
154 mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0
155 mov.l r0, @r1 ! SB_SDWCR set
157 mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1
158 mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0
159 mov.l r0, @r1 ! SB_SDPCR set
161 mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1
162 mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0
163 mov.l r0, @r1 ! SB_RTCOR set
165 mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1
166 mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0
169 mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1
170 mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0
171 mov.l r0, @r1 ! SB_RTCSR set
173 mov.l RFCR_A, r1 ! SB_RFCR address -> R1
174 mov.l RFCR_D, r0 ! SB_RFCR data -> R0
177 mov.l SDMR3_A, r1 ! SDMR3 address -> R1
178 mov #0x00, r0 ! SDMR3 data -> R0
179 mov.b r0, @r1 ! SDMR3 set
181 ! BL bit off (init = ON) (?!?)
183 stc sr, r0 ! BL bit off(init=ON)
197 MSTPCR0_A: .long MSTPCR0
198 MSTPCR2_A: .long MSTPCR2
199 PFC_PULCR_A: .long PULCR
200 PFC_DRVCR_A: .long DRVCR
203 RWTCSR_A: .long RWTCSR
204 RWTCNT_A: .long RWTCNT
207 DLLFRQ_A: .long DLLFRQ
209 CCR_D: .long 0x00000800
210 CCR_D_2: .long 0x00000103
211 MMUCR_D: .long 0x00000004
212 MSTPCR0_D: .long 0x00001001
213 MSTPCR2_D: .long 0xffffffff
214 PFC_PULCR_D: .long 0x6000
215 PFC_DRVCR_D: .long 0x0464
216 FRQCR_D: .long 0x07033639
217 PLLCR_D: .long 0x00005000
218 DLLFRQ_D: .long 0x000004F6 ! 20080115
221 CMNCR_D: .long 0x0000001B ! 20080115
222 CS0BCR_A: .long CS0BCR ! Flash bank 1
223 CS0BCR_D: .long 0x24920400
224 CS4BCR_A: .long CS4BCR !
225 CS4BCR_D: .long 0x10003400 ! 20080115
226 CS5ABCR_A: .long CS5ABCR !
227 CS5ABCR_D: .long 0x24920400
228 CS5BBCR_A: .long CS5BBCR !
229 CS5BBCR_D: .long 0x24920400
230 CS6ABCR_A: .long CS6ABCR !
231 CS6ABCR_D: .long 0x24920400
233 CS0WCR_A: .long CS0WCR
234 CS0WCR_D: .long 0x00000380
235 CS4WCR_A: .long CS4WCR
236 CS4WCR_D: .long 0x00100A81 ! 20080115
237 CS5AWCR_A: .long CS5AWCR
238 CS5AWCR_D: .long 0x00000300
239 CS5BWCR_A: .long CS5BWCR
240 CS5BWCR_D: .long 0x00000300
241 CS6AWCR_A: .long CS6AWCR
242 CS6AWCR_D: .long 0x00000300
244 SDCR_A: .long SBSC_SDCR
245 SDCR_D: .long 0x80160809 ! 20080115
246 SDWCR_A: .long SBSC_SDWCR
247 SDWCR_D: .long 0x0014450C ! 20080115
248 SDPCR_A: .long SBSC_SDPCR
249 SDPCR_D: .long 0x00000087
250 RTCOR_A: .long SBSC_RTCOR
251 RTCNT_A: .long SBSC_RTCNT
252 RTCNT_D: .long 0xA55A0012
253 RTCOR_D: .long 0xA55A001C ! 20080115
254 RTCSR_A: .long SBSC_RTCSR
255 RFCR_A: .long SBSC_RFCR
256 RFCR_D: .long 0xA55A0221
257 RTCSR_D: .long 0xA55A009a ! 20080115
258 SDMR3_A: .long 0xFE581180 ! 20080115
260 SR_MASK_D: .long 0xEFFFFF0F
264 SBSCR_D: .word 0x0044
266 RWTCSR_D_1: .word 0xA507
267 RWTCSR_D_2: .word 0xA504 ! 20080115
268 RWTCNT_D: .word 0x5A00