3 * Michael Schwingen, michael@schwingen.org
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #include <asm/arch/ixp425.h>
42 #include "actux2_hw.h"
44 DECLARE_GLOBAL_DATA_PTR;
48 gd->bd->bi_arch_number = MACH_TYPE_ACTUX2;
50 /* adress of boot parameters */
51 gd->bd->bi_boot_params = 0x00000100;
53 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
54 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_ETHRST);
55 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DSR);
56 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DCD);
58 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
59 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_ETHRST);
61 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_DSR);
62 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_DCD);
64 /* Setup GPIO's for Interrupt inputs */
65 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_DBGINT);
66 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_ETHINT);
68 /* Setup GPIO's for 33MHz clock output */
69 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
70 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
71 *IXP425_GPIO_GPCLKR = 0x011001FF;
74 *IXP425_EXP_CS1 = 0x94d10013;
76 *IXP425_EXP_CS5 = 0x9d520003;
77 /* CS6: HW release register */
78 *IXP425_EXP_CS6 = 0x81860001;
80 *IXP425_EXP_CS7 = 0x80900003;
83 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
84 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST);
95 * Check Board Identity
99 char *s = getenv ("serial#");
101 puts ("Board: AcTux-2 rev.");
102 putc (ACTUX2_BOARDREL + 'A' - 1);
115 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
116 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
121 /*************************************************************************
122 * get_board_rev() - setup to pass kernel board revision information
126 *************************************************************************/
127 u32 get_board_rev (void)
129 return ACTUX2_BOARDREL;
132 void reset_phy (void)
134 /* init IcPlus IP175C ethernet switch to native IP175C mode */
135 miiphy_write ("NPE0", 29, 31, 0x175C);