3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/processor.h>
30 void show_reset_reg(void)
34 /* read clock regsiter */
35 printf("===== Display reset and initialize register Start =========\n");
37 printf("cpr_pllc = %#010lx\n",reg);
40 printf("cpr_plld = %#010lx\n",reg);
42 mfcpr(CPR0_PRIMAD0,reg);
43 printf("cpr_primad = %#010lx\n",reg);
45 mfcpr(CPR0_PRIMBD0,reg);
46 printf("cpr_primbd = %#010lx\n",reg);
48 mfcpr(CPR0_OPBD0,reg);
49 printf("cpr_opbd = %#010lx\n",reg);
52 printf("cpr_perd = %#010lx\n",reg);
55 printf("cpr_mald = %#010lx\n",reg);
57 /* read sdr register */
59 printf("SDR0_EBC = %#010lx\n",reg);
61 mfsdr(SDR0_CP440,reg);
62 printf("SDR0_CP440 = %#010lx\n",reg);
65 printf("SDR0_XCR = %#010lx\n",reg);
67 mfsdr(SDR0_XPLLC,reg);
68 printf("SDR0_XPLLC = %#010lx\n",reg);
70 mfsdr(SDR0_XPLLD,reg);
71 printf("SDR0_XPLLD = %#010lx\n",reg);
74 printf("SDR0_PFC0 = %#010lx\n",reg);
77 printf("SDR0_PFC1 = %#010lx\n",reg);
79 mfsdr(SDR0_CUST0,reg);
80 printf("SDR0_CUST0 = %#010lx\n",reg);
82 mfsdr(SDR0_CUST1,reg);
83 printf("SDR0_CUST1 = %#010lx\n",reg);
85 mfsdr(SDR0_UART0,reg);
86 printf("SDR0_UART0 = %#010lx\n",reg);
88 mfsdr(SDR0_UART1,reg);
89 printf("SDR0_UART1 = %#010lx\n",reg);
91 printf("===== Display reset and initialize register End =========\n");
94 void show_xbridge_info(void)
98 printf("PCI-X chip control registers\n");
100 printf("SDR0_XCR = %#010lx\n", reg);
102 mfsdr(SDR0_XPLLC, reg);
103 printf("SDR0_XPLLC = %#010lx\n", reg);
105 mfsdr(SDR0_XPLLD, reg);
106 printf("SDR0_XPLLD = %#010lx\n", reg);
108 printf("PCI-X Bridge Configure registers\n");
109 printf("PCIL0_VENDID = %#06x\n", in16r(PCIL0_VENDID));
110 printf("PCIL0_DEVID = %#06x\n", in16r(PCIL0_DEVID));
111 printf("PCIL0_CMD = %#06x\n", in16r(PCIL0_CMD));
112 printf("PCIL0_STATUS = %#06x\n", in16r(PCIL0_STATUS));
113 printf("PCIL0_REVID = %#04x\n", in8(PCIL0_REVID));
114 printf("PCIL0_CACHELS = %#04x\n", in8(PCIL0_CACHELS));
115 printf("PCIL0_LATTIM = %#04x\n", in8(PCIL0_LATTIM));
116 printf("PCIL0_HDTYPE = %#04x\n", in8(PCIL0_HDTYPE));
117 printf("PCIL0_BIST = %#04x\n", in8(PCIL0_BIST));
119 printf("PCIL0_BAR0 = %#010lx\n", in32r(PCIL0_BAR0));
120 printf("PCIL0_BAR1 = %#010lx\n", in32r(PCIL0_BAR1));
121 printf("PCIL0_BAR2 = %#010lx\n", in32r(PCIL0_BAR2));
122 printf("PCIL0_BAR3 = %#010lx\n", in32r(PCIL0_BAR3));
123 printf("PCIL0_BAR4 = %#010lx\n", in32r(PCIL0_BAR4));
124 printf("PCIL0_BAR5 = %#010lx\n", in32r(PCIL0_BAR5));
126 printf("PCIL0_CISPTR = %#010lx\n", in32r(PCIL0_CISPTR));
127 printf("PCIL0_SBSSYSVID = %#010x\n", in16r(PCIL0_SBSYSVID));
128 printf("PCIL0_SBSSYSID = %#010x\n", in16r(PCIL0_SBSYSID));
129 printf("PCIL0_EROMBA = %#010lx\n", in32r(PCIL0_EROMBA));
130 printf("PCIL0_CAP = %#04x\n", in8(PCIL0_CAP));
131 printf("PCIL0_INTLN = %#04x\n", in8(PCIL0_INTLN));
132 printf("PCIL0_INTPN = %#04x\n", in8(PCIL0_INTPN));
133 printf("PCIL0_MINGNT = %#04x\n", in8(PCIL0_MINGNT));
134 printf("PCIL0_MAXLTNCY = %#04x\n", in8(PCIL0_MAXLTNCY));
136 printf("PCIL0_BRDGOPT1 = %#010lx\n", in32r(PCIL0_BRDGOPT1));
137 printf("PCIL0_BRDGOPT2 = %#010lx\n", in32r(PCIL0_BRDGOPT2));
139 printf("PCIL0_POM0LAL = %#010lx\n", in32r(PCIL0_POM0LAL));
140 printf("PCIL0_POM0LAH = %#010lx\n", in32r(PCIL0_POM0LAH));
141 printf("PCIL0_POM0SA = %#010lx\n", in32r(PCIL0_POM0SA));
142 printf("PCIL0_POM0PCILAL = %#010lx\n", in32r(PCIL0_POM0PCIAL));
143 printf("PCIL0_POM0PCILAH = %#010lx\n", in32r(PCIL0_POM0PCIAH));
144 printf("PCIL0_POM1LAL = %#010lx\n", in32r(PCIL0_POM1LAL));
145 printf("PCIL0_POM1LAH = %#010lx\n", in32r(PCIL0_POM1LAH));
146 printf("PCIL0_POM1SA = %#010lx\n", in32r(PCIL0_POM1SA));
147 printf("PCIL0_POM1PCILAL = %#010lx\n", in32r(PCIL0_POM1PCIAL));
148 printf("PCIL0_POM1PCILAH = %#010lx\n", in32r(PCIL0_POM1PCIAH));
149 printf("PCIL0_POM2SA = %#010lx\n", in32r(PCIL0_POM2SA));
151 printf("PCIL0_PIM0SA = %#010lx\n", in32r(PCIL0_PIM0SA));
152 printf("PCIL0_PIM0LAL = %#010lx\n", in32r(PCIL0_PIM0LAL));
153 printf("PCIL0_PIM0LAH = %#010lx\n", in32r(PCIL0_PIM0LAH));
154 printf("PCIL0_PIM1SA = %#010lx\n", in32r(PCIL0_PIM1SA));
155 printf("PCIL0_PIM1LAL = %#010lx\n", in32r(PCIL0_PIM1LAL));
156 printf("PCIL0_PIM1LAH = %#010lx\n", in32r(PCIL0_PIM1LAH));
157 printf("PCIL0_PIM2SA = %#010lx\n", in32r(PCIL0_PIM1SA));
158 printf("PCIL0_PIM2LAL = %#010lx\n", in32r(PCIL0_PIM1LAL));
159 printf("PCIL0_PIM2LAH = %#010lx\n", in32r(PCIL0_PIM1LAH));
161 printf("PCIL0_XSTS = %#010lx\n", in32r(PCIL0_STS));
164 int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
170 U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info,
171 "Show PCIX bridge info", "");
173 #define TAISHAN_PCI_DEV_ID0 0x800
174 #define TAISHAN_PCI_DEV_ID1 0x1000
176 void show_pcix_device_info(void)
186 for (ii = 0; ii < 2; ii++) {
188 dev = TAISHAN_PCI_DEV_ID0;
190 dev = TAISHAN_PCI_DEV_ID1;
192 pci_read_config_word(dev, PCI_STATUS, &status);
193 if (status & PCI_STATUS_CAP_LIST) {
194 pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &capp);
196 pci_read_config_byte(dev, (int)(capp), &xcapid);
197 if (xcapid == 0x07) {
198 pci_read_config_word(dev, (int)(capp + 2),
200 pci_read_config_dword(dev, (int)(capp + 4),
202 printf("BUS0 dev%d Xcommand=%#06x,Xstatus=%#010x\n",
203 (ii + 1), xcommand, xstatus);
205 printf("BUS0 dev%d PCI-X CAP ID error,"
206 "CAP=%#04x,XCAPID=%#04x\n",
207 (ii + 1), capp, xcapid);
210 printf("BUS0 dev%d not found PCI_STATUS_CAP_LIST supporting\n",
217 int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc,
220 show_pcix_device_info();
224 U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info,
225 "Show PCIX Device info", "");
227 extern void show_reset_reg(void);
229 int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
235 U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info,
236 "Show Reset REG info", "");