2 * Copyright (C) 2010 Atmel Corporation
4 * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/sdram.h>
31 #include <asm/arch/clk.h>
32 #include <asm/arch/gpio.h>
33 #include <asm/arch/hmatrix.h>
34 #include <asm/arch/mmu.h>
35 #include <asm/arch/portmux.h>
37 DECLARE_GLOBAL_DATA_PTR;
39 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
41 /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */
42 .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
43 .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
44 .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
47 /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */
48 .virt_pgno = EBI_SRAM_CS3_BASE >> PAGE_SHIFT,
49 .nr_pages = EBI_SRAM_CS3_SIZE >> PAGE_SHIFT,
50 .phys = (EBI_SRAM_CS3_BASE >> PAGE_SHIFT)
53 /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */
54 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
55 .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
56 .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
57 | MMU_VMR_CACHE_WRBACK,
61 static const struct sdram_config sdram_config = {
62 .data_bits = SDRAM_DATA_32BIT,
74 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
77 int board_early_init_f(void)
79 /* Enable SDRAM in the EBI mux */
80 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)
81 | HMATRIX_BIT(EBI_NAND_ENABLE));
83 portmux_enable_ebi(32, 23, PORTMUX_EBI_NAND,
85 portmux_select_gpio(PORTMUX_PORT_E, 1 << 23,
86 PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH
88 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
90 #if defined(CONFIG_MACB)
91 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
92 portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
94 #if defined(CONFIG_MMC)
95 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
97 #if defined(CONFIG_ATMEL_SPI)
98 portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
104 phys_size_t initdram(int board_type)
106 unsigned long expected_size;
107 unsigned long actual_size;
110 sdram_base = uncached(EBI_SDRAM_BASE);
112 expected_size = sdram_init(sdram_base, &sdram_config);
113 actual_size = get_ram_size(sdram_base, expected_size);
115 if (expected_size != actual_size)
116 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
117 actual_size >> 20, expected_size >> 20);
122 int board_early_init_r(void)
124 gd->bd->bi_phy_id[0] = 0x01;
125 gd->bd->bi_phy_id[1] = 0x03;
129 #ifdef CONFIG_CMD_NET
130 int board_eth_init(bd_t *bi)
132 macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
133 macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
138 /* SPI chip select control */
139 #ifdef CONFIG_ATMEL_SPI
140 #define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
142 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
144 return bus == 0 && cs == 0;
147 void spi_cs_activate(struct spi_slave *slave)
149 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
152 void spi_cs_deactivate(struct spi_slave *slave)
154 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
156 #endif /* CONFIG_ATMEL_SPI */