4 * Copyright (c) 2005-2007 Analog Devices Inc.
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
29 #if defined(CONFIG_MISC_INIT_R)
33 DECLARE_GLOBAL_DATA_PTR;
37 #if (BFIN_CPU == ADSP_BF531)
38 printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
39 #elif (BFIN_CPU == ADSP_BF532)
40 printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID >> 28);
42 printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
44 printf("Board: ADI BF533 EZ-Kit Lite board\n");
45 printf(" Support: http://blackfin.uclinux.org/\n");
49 long int initdram(int board_type)
53 char *tmp = getenv("baudrate");
54 brate = simple_strtoul(tmp, NULL, 16);
55 printf("Serial Port initialized with Baud rate = %x\n", brate);
56 printf("SDRAM attributes:\n");
57 printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
58 "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
60 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
61 printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
63 gd->bd->bi_memstart = CFG_SDRAM_BASE;
64 gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
65 return CFG_MAX_RAM_SIZE;
68 #if defined(CONFIG_MISC_INIT_R)
69 /* miscellaneous platform dependent initialisations */
72 /* Set direction bits for Video en/decoder reset as output */
73 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DIR) =
74 PSDA_VDEC_RST | PSDA_VENC_RST;
75 /* Deactivate Video en/decoder reset lines */
76 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DOUT) =
77 PSDA_VDEC_RST | PSDA_VENC_RST;