2 * Bluewater Systems Snapper 9260/9G20 modules
4 * (C) Copyright 2011 Bluewater Systems
5 * Author: Andre Renaud <andre@bluewatersys.com>
6 * Author: Ryan Mallon <ryan@bluewatersys.com>
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/at91sam9260_matrix.h>
14 #include <asm/arch/at91sam9_smc.h>
15 #include <asm/arch/at91_common.h>
16 #include <asm/arch/at91_pmc.h>
17 #include <asm/arch/at91_rstc.h>
18 #include <asm/arch/gpio.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 /* IO Expander pins */
27 #define IO_EXP_ETH_RESET (0 << 1)
28 #define IO_EXP_ETH_POWER (1 << 1)
30 static void macb_hw_init(void)
32 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
33 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
34 struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
38 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
40 /* Disable pull-ups to prevent PHY going into test mode */
41 writel(pin_to_mask(AT91_PIN_PA14) |
42 pin_to_mask(AT91_PIN_PA15) |
43 pin_to_mask(AT91_PIN_PA18),
46 /* Power down ethernet */
47 pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
48 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
50 /* Hold ethernet in reset */
51 pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
52 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
54 /* Enable ethernet power */
55 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
57 /* Need to reset PHY -> 500ms reset */
58 erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
59 writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
60 AT91_RSTC_MR_URSTEN, &rstc->mr);
61 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
63 /* Wait for end hardware reset */
64 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
67 /* Restore NRST value */
68 writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
70 /* Bring the ethernet out of reset */
71 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
73 /* The phy internal reset take 21ms */
76 /* Re-enable pull-up */
77 writel(pin_to_mask(AT91_PIN_PA14) |
78 pin_to_mask(AT91_PIN_PA15) |
79 pin_to_mask(AT91_PIN_PA18),
85 static void nand_hw_init(void)
87 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
88 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
91 /* Enable CS3 as NAND/SmartMedia */
92 csa = readl(&matrix->ebicsa);
93 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
94 writel(csa, &matrix->ebicsa);
96 /* Configure SMC CS3 for NAND/SmartMedia */
97 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
98 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
100 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
101 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
103 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
105 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
106 AT91_SMC_MODE_EXNW_DISABLE |
107 AT91_SMC_MODE_DBW_8 |
108 AT91_SMC_MODE_TDF_CYCLE(3),
111 /* Configure RDY/BSY */
112 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
114 /* Enable NandFlash */
115 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
120 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
122 /* Enable PIO clocks */
123 writel((1 << ATMEL_ID_PIOA) |
124 (1 << ATMEL_ID_PIOB) |
125 (1 << ATMEL_ID_PIOC), &pmc->pcer);
127 /* The mach-type is the same for both Snapper 9260 and 9G20 */
128 gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
130 /* Address of boot parameters */
131 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
133 /* Initialise peripherals */
134 at91_seriald_hw_init();
142 int board_eth_init(bd_t *bis)
144 return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
149 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
150 CONFIG_SYS_SDRAM_SIZE);