git.sur5r.net Git - u-boot/blob - board/compulab/cm_t35/display.c

   1 /*
   2  * (C) Copyright 2012 - 2013 CompuLab, Ltd. <www.compulab.co.il>
   3  *
   4  * Authors: Nikita Kiryanov <nikita@compulab.co.il>
   5  *
   6  * Parsing code based on linux/drivers/video/pxafb.c
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <asm/gpio.h>
  13 #include <asm/io.h>
  14 #include <stdio_dev.h>
  15 #include <asm/arch/dss.h>
  16 #include <lcd.h>
  17 #include <asm/arch-omap3/dss.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 enum display_type {
  22         NONE,
  23         DVI,
  24         DVI_CUSTOM,
  25 };
  26
  27 #define CMAP_ADDR       0x80100000
  28
  29 /*
  30  * The frame buffer is allocated before we have the chance to parse user input.
  31  * To make sure enough memory is allocated for all resolutions, we define
  32  * vl_{col | row} to the maximal resolution supported by OMAP3.
  33  */
  34 vidinfo_t panel_info = {
  35         .vl_col  = 1400,
  36         .vl_row  = 1050,
  37         .vl_bpix = LCD_BPP,
  38         .cmap = (ushort *)CMAP_ADDR,
  39 };
  40
  41 static struct panel_config panel_cfg;
  42 static enum display_type lcd_def;
  43
  44 /*
  45  * A note on DVI presets;
  46  * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can
  47  * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to
  48  * support two BMP types with one setting.
  49  */
  50 static const struct panel_config preset_dvi_640X480 = {
  51         .lcd_size       = PANEL_LCD_SIZE(640, 480),
  52         .timing_h       = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96),
  53         .timing_v       = DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2),
  54         .divisor        = 12 | (1 << 16),
  55         .data_lines     = LCD_INTERFACE_24_BIT,
  56         .panel_type     = ACTIVE_DISPLAY,
  57         .load_mode      = 2,
  58         .gfx_format     = GFXFORMAT_RGB16,
  59 };
  60
  61 static const struct panel_config preset_dvi_800X600 = {
  62         .lcd_size       = PANEL_LCD_SIZE(800, 600),
  63         .timing_h       = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128),
  64         .timing_v       = DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4),
  65         .divisor        = 8 | (1 << 16),
  66         .data_lines     = LCD_INTERFACE_24_BIT,
  67         .panel_type     = ACTIVE_DISPLAY,
  68         .load_mode      = 2,
  69         .gfx_format     = GFXFORMAT_RGB16,
  70 };
  71
  72 static const struct panel_config preset_dvi_1024X768 = {
  73         .lcd_size       = PANEL_LCD_SIZE(1024, 768),
  74         .timing_h       = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136),
  75         .timing_v       = DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6),
  76         .divisor        = 5 | (1 << 16),
  77         .data_lines     = LCD_INTERFACE_24_BIT,
  78         .panel_type     = ACTIVE_DISPLAY,
  79         .load_mode      = 2,
  80         .gfx_format     = GFXFORMAT_RGB16,
  81 };
  82
  83 static const struct panel_config preset_dvi_1152X864 = {
  84         .lcd_size       = PANEL_LCD_SIZE(1152, 864),
  85         .timing_h       = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128),
  86         .timing_v       = DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3),
  87         .divisor        = 3 | (1 << 16),
  88         .data_lines     = LCD_INTERFACE_24_BIT,
  89         .panel_type     = ACTIVE_DISPLAY,
  90         .load_mode      = 2,
  91         .gfx_format     = GFXFORMAT_RGB16,
  92 };
  93
  94 static const struct panel_config preset_dvi_1280X960 = {
  95         .lcd_size       = PANEL_LCD_SIZE(1280, 960),
  96         .timing_h       = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112),
  97         .timing_v       = DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3),
  98         .divisor        = 3 | (1 << 16),
  99         .data_lines     = LCD_INTERFACE_24_BIT,
 100         .panel_type     = ACTIVE_DISPLAY,
 101         .load_mode      = 2,
 102         .gfx_format     = GFXFORMAT_RGB16,
 103 };
 104
 105 static const struct panel_config preset_dvi_1280X1024 = {
 106         .lcd_size       = PANEL_LCD_SIZE(1280, 1024),
 107         .timing_h       = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112),
 108         .timing_v       = DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3),
 109         .divisor        = 3 | (1 << 16),
 110         .data_lines     = LCD_INTERFACE_24_BIT,
 111         .panel_type     = ACTIVE_DISPLAY,
 112         .load_mode      = 2,
 113         .gfx_format     = GFXFORMAT_RGB16,
 114 };
 115
 116 /*
 117  * set_resolution_params()
 118  *
 119  * Due to usage of multiple display related APIs resolution data is located in
 120  * more than one place. This function updates them all.
 121  */
 122 static void set_resolution_params(int x, int y)
 123 {
 124         panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y);
 125         panel_info.vl_col = x;
 126         panel_info.vl_row = y;
 127         lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
 128 }
 129
 130 static void set_preset(const struct panel_config preset, int x_res, int y_res)
 131 {
 132         panel_cfg = preset;
 133         set_resolution_params(x_res, y_res);
 134 }
 135
 136 static enum display_type set_dvi_preset(const struct panel_config preset,
 137                                         int x_res, int y_res)
 138 {
 139         set_preset(preset, x_res, y_res);
 140         return DVI;
 141 }
 142
 143 /*
 144  * parse_mode() - parse the mode parameter of custom lcd settings
 145  *
 146  * @mode:       <res_x>x<res_y>
 147  *
 148  * Returns -1 on error, 0 on success.
 149  */
 150 static int parse_mode(const char *mode)
 151 {
 152         unsigned int modelen = strlen(mode);
 153         int res_specified = 0;
 154         unsigned int xres = 0, yres = 0;
 155         int yres_specified = 0;
 156         int i;
 157
 158         for (i = modelen - 1; i >= 0; i--) {
 159                 switch (mode[i]) {
 160                 case 'x':
 161                         if (!yres_specified) {
 162                                 yres = simple_strtoul(&mode[i + 1], NULL, 0);
 163                                 yres_specified = 1;
 164                         } else {
 165                                 goto done_parsing;
 166                         }
 167
 168                         break;
 169                 case '0' ... '9':
 170                         break;
 171                 default:
 172                         goto done_parsing;
 173                 }
 174         }
 175
 176         if (i < 0 && yres_specified) {
 177                 xres = simple_strtoul(mode, NULL, 0);
 178                 res_specified = 1;
 179         }
 180
 181 done_parsing:
 182         if (res_specified) {
 183                 set_resolution_params(xres, yres);
 184         } else {
 185                 printf("LCD: invalid mode: %s\n", mode);
 186                 return -1;
 187         }
 188
 189         return 0;
 190 }
 191
 192 #define PIXEL_CLK_NUMERATOR (26 * 432 / 39)
 193 /*
 194  * parse_pixclock() - Parse the pixclock parameter of custom lcd settings
 195  *
 196  * @pixclock:   the desired pixel clock
 197  *
 198  * Returns -1 on error, 0 on success.
 199  *
 200  * Handling the pixel_clock:
 201  *
 202  * Pixel clock is defined in the OMAP35x TRM as follows:
 203  * pixel_clock =
 204  * (SYS_CLK * 2 * PRCM.CM_CLKSEL2_PLL[18:8]) /
 205  * (DSS.DISPC_DIVISOR[23:16] * DSS.DISPC_DIVISOR[6:0] *
 206  * PRCM.CM_CLKSEL_DSS[4:0] * (PRCM.CM_CLKSEL2_PLL[6:0] + 1))
 207  *
 208  * In practice, this means that in order to set the
 209  * divisor for the desired pixel clock one needs to
 210  * solve the following equation:
 211  *
 212  * 26 * 432 / (39 * <pixel_clock>) = DSS.DISPC_DIVISOR[6:0]
 213  *
 214  * NOTE: the explicit equation above is reduced. Do not
 215  * try to infer anything from these numbers.
 216  */
 217 static int parse_pixclock(char *pixclock)
 218 {
 219         int divisor, pixclock_val;
 220         char *pixclk_start = pixclock;
 221
 222         pixclock_val = simple_strtoul(pixclock, &pixclock, 10);
 223         divisor = DIV_ROUND_UP(PIXEL_CLK_NUMERATOR, pixclock_val);
 224         /* 0 and 1 are illegal values for PCD */
 225         if (divisor <= 1)
 226                 divisor = 2;
 227
 228         panel_cfg.divisor = divisor | (1 << 16);
 229         if (pixclock[0] != '\0') {
 230                 printf("LCD: invalid value for pixclock:%s\n", pixclk_start);
 231                 return -1;
 232         }
 233
 234         return 0;
 235 }
 236
 237 /*
 238  * parse_setting() - parse a single setting of custom lcd parameters
 239  *
 240  * @setting:    The custom lcd setting <name>:<value>
 241  *
 242  * Returns -1 on failure, 0 on success.
 243  */
 244 static int parse_setting(char *setting)
 245 {
 246         int num_val;
 247         char *setting_start = setting;
 248
 249         if (!strncmp(setting, "mode:", 5)) {
 250                 return parse_mode(setting + 5);
 251         } else if (!strncmp(setting, "pixclock:", 9)) {
 252                 return parse_pixclock(setting + 9);
 253         } else if (!strncmp(setting, "left:", 5)) {
 254                 num_val = simple_strtoul(setting + 5, &setting, 0);
 255                 panel_cfg.timing_h |= DSS_HBP(num_val);
 256         } else if (!strncmp(setting, "right:", 6)) {
 257                 num_val = simple_strtoul(setting + 6, &setting, 0);
 258                 panel_cfg.timing_h |= DSS_HFP(num_val);
 259         } else if (!strncmp(setting, "upper:", 6)) {
 260                 num_val = simple_strtoul(setting + 6, &setting, 0);
 261                 panel_cfg.timing_v |= DSS_VBP(num_val);
 262         } else if (!strncmp(setting, "lower:", 6)) {
 263                 num_val = simple_strtoul(setting + 6, &setting, 0);
 264                 panel_cfg.timing_v |= DSS_VFP(num_val);
 265         } else if (!strncmp(setting, "hsynclen:", 9)) {
 266                 num_val = simple_strtoul(setting + 9, &setting, 0);
 267                 panel_cfg.timing_h |= DSS_HSW(num_val);
 268         } else if (!strncmp(setting, "vsynclen:", 9)) {
 269                 num_val = simple_strtoul(setting + 9, &setting, 0);
 270                 panel_cfg.timing_v |= DSS_VSW(num_val);
 271         } else if (!strncmp(setting, "hsync:", 6)) {
 272                 if (simple_strtoul(setting + 6, &setting, 0) == 0)
 273                         panel_cfg.pol_freq |= DSS_IHS;
 274                 else
 275                         panel_cfg.pol_freq &= ~DSS_IHS;
 276         } else if (!strncmp(setting, "vsync:", 6)) {
 277                 if (simple_strtoul(setting + 6, &setting, 0) == 0)
 278                         panel_cfg.pol_freq |= DSS_IVS;
 279                 else
 280                         panel_cfg.pol_freq &= ~DSS_IVS;
 281         } else if (!strncmp(setting, "outputen:", 9)) {
 282                 if (simple_strtoul(setting + 9, &setting, 0) == 0)
 283                         panel_cfg.pol_freq |= DSS_IEO;
 284                 else
 285                         panel_cfg.pol_freq &= ~DSS_IEO;
 286         } else if (!strncmp(setting, "pixclockpol:", 12)) {
 287                 if (simple_strtoul(setting + 12, &setting, 0) == 0)
 288                         panel_cfg.pol_freq |= DSS_IPC;
 289                 else
 290                         panel_cfg.pol_freq &= ~DSS_IPC;
 291         } else if (!strncmp(setting, "active", 6)) {
 292                 panel_cfg.panel_type = ACTIVE_DISPLAY;
 293                 return 0; /* Avoid sanity check below */
 294         } else if (!strncmp(setting, "passive", 7)) {
 295                 panel_cfg.panel_type = PASSIVE_DISPLAY;
 296                 return 0; /* Avoid sanity check below */
 297         } else if (!strncmp(setting, "display:", 8)) {
 298                 if (!strncmp(setting + 8, "dvi", 3)) {
 299                         lcd_def = DVI_CUSTOM;
 300                         return 0; /* Avoid sanity check below */
 301                 }
 302         } else {
 303                 printf("LCD: unknown option %s\n", setting_start);
 304                 return -1;
 305         }
 306
 307         if (setting[0] != '\0') {
 308                 printf("LCD: invalid value for %s\n", setting_start);
 309                 return -1;
 310         }
 311
 312         return 0;
 313 }
 314
 315 /*
 316  * env_parse_customlcd() - parse custom lcd params from an environment variable.
 317  *
 318  * @custom_lcd_params:  The environment variable containing the lcd params.
 319  *
 320  * Returns -1 on failure, 0 on success.
 321  */
 322 static int parse_customlcd(char *custom_lcd_params)
 323 {
 324         char params_cpy[160];
 325         char *setting;
 326
 327         strncpy(params_cpy, custom_lcd_params, 160);
 328         setting = strtok(params_cpy, ",");
 329         while (setting) {
 330                 if (parse_setting(setting) < 0)
 331                         return -1;
 332
 333                 setting = strtok(NULL, ",");
 334         }
 335
 336         /* Currently we don't support changing this via custom lcd params */
 337         panel_cfg.data_lines = LCD_INTERFACE_24_BIT;
 338         panel_cfg.gfx_format = GFXFORMAT_RGB16; /* See dvi predefines note */
 339
 340         return 0;
 341 }
 342
 343 /*
 344  * env_parse_displaytype() - parse display type.
 345  *
 346  * Parses the environment variable "displaytype", which contains the
 347  * name of the display type or preset, in which case it applies its
 348  * configurations.
 349  *
 350  * Returns the type of display that was specified.
 351  */
 352 static enum display_type env_parse_displaytype(char *displaytype)
 353 {
 354         if (!strncmp(displaytype, "dvi640x480", 10))
 355                 return set_dvi_preset(preset_dvi_640X480, 640, 480);
 356         else if (!strncmp(displaytype, "dvi800x600", 10))
 357                 return set_dvi_preset(preset_dvi_800X600, 800, 600);
 358         else if (!strncmp(displaytype, "dvi1024x768", 11))
 359                 return set_dvi_preset(preset_dvi_1024X768, 1024, 768);
 360         else if (!strncmp(displaytype, "dvi1152x864", 11))
 361                 return set_dvi_preset(preset_dvi_1152X864, 1152, 864);
 362         else if (!strncmp(displaytype, "dvi1280x960", 11))
 363                 return set_dvi_preset(preset_dvi_1280X960, 1280, 960);
 364         else if (!strncmp(displaytype, "dvi1280x1024", 12))
 365                 return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024);
 366
 367         return NONE;
 368 }
 369
 370 void lcd_ctrl_init(void *lcdbase)
 371 {
 372         struct prcm *prcm = (struct prcm *)PRCM_BASE;
 373         char *custom_lcd;
 374         char *displaytype = getenv("displaytype");
 375
 376         if (displaytype == NULL)
 377                 return;
 378
 379         lcd_def = env_parse_displaytype(displaytype);
 380         /* If we did not recognize the preset, check if it's an env variable */
 381         if (lcd_def == NONE) {
 382                 custom_lcd = getenv(displaytype);
 383                 if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
 384                         return;
 385         }
 386
 387         panel_cfg.frame_buffer = lcdbase;
 388         omap3_dss_panel_config(&panel_cfg);
 389         /*
 390          * Pixel clock is defined with many divisions and only few
 391          * multiplications of the system clock. Since DSS FCLK divisor is set
 392          * to 16 by default, we need to set it to a smaller value, like 3
 393          * (chosen via trial and error).
 394          */
 395         clrsetbits_le32(&prcm->clksel_dss, 0xF, 3);
 396 }
 397
 398 void lcd_enable(void)
 399 {
 400         if (lcd_def == DVI || lcd_def == DVI_CUSTOM) {
 401                 gpio_direction_output(54, 0); /* Turn on DVI */
 402                 omap3_dss_enable();
 403         }
 404 }
 405
 406 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {}