3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/arch/pxa-regs.h>
31 /* ------------------------------------------------------------------------- */
34 /* local prototypes */
35 void set_led (int led, int color);
36 void error_code_halt (int code);
37 int init_sio (int led, unsigned long base);
38 inline void cradle_outb (unsigned short val, unsigned long base,
40 inline unsigned char cradle_inb (unsigned long base, unsigned long reg);
41 inline void sleep (int i);
44 /**********************************************************/
46 /**********************************************************/
54 /**********************************************************/
55 error_code_halt (int code)
56 /**********************************************************/
67 /**********************************************************/
68 led_code (int code, int color)
69 /**********************************************************/
73 code &= 0xf; /* only 4 leds */
75 for (i = 0; i < 4; i++) {
76 if (code & (1 << i)) {
85 /**********************************************************/
86 set_led (int led, int color)
87 /**********************************************************/
90 unsigned long mask = 0x3 << shift;
92 CRADLE_LED_CLR_REG = mask; /* clear bits */
93 CRADLE_LED_SET_REG = (color << shift); /* set bits */
98 /**********************************************************/
99 cradle_outb (unsigned short val, unsigned long base, unsigned long reg)
100 /**********************************************************/
102 *(volatile unsigned short *) (base + (reg * 2)) = val;
106 /**********************************************************/
107 cradle_inb (unsigned long base, unsigned long reg)
108 /**********************************************************/
112 val = *(volatile unsigned short *) (base + (reg * 2));
117 /**********************************************************/
118 init_sio (int led, unsigned long base)
119 /**********************************************************/
123 set_led (led, YELLOW);
124 val = cradle_inb (base, CRADLE_SIO_INDEX);
125 val = cradle_inb (base, CRADLE_SIO_INDEX);
131 /* map SCC2 to COM1 */
132 cradle_outb (0x01, base, CRADLE_SIO_INDEX);
133 cradle_outb (0x00, base, CRADLE_SIO_DATA);
135 /* enable SCC2 extended regs */
136 cradle_outb (0x40, base, CRADLE_SIO_INDEX);
137 cradle_outb (0xa0, base, CRADLE_SIO_DATA);
139 /* enable SCC2 clock multiplier */
140 cradle_outb (0x51, base, CRADLE_SIO_INDEX);
141 cradle_outb (0x04, base, CRADLE_SIO_DATA);
144 cradle_outb (0x00, base, CRADLE_SIO_INDEX);
145 cradle_outb (0x04, base, CRADLE_SIO_DATA);
147 /* map SCC2 DMA to channel 0 */
148 cradle_outb (0x4f, base, CRADLE_SIO_INDEX);
149 cradle_outb (0x09, base, CRADLE_SIO_DATA);
151 /* read ID from SIO to check operation */
152 cradle_outb (0xe4, base, 0x3f8 + 0x3);
153 val = cradle_inb (base, 0x3f8 + 0x0);
154 if ((val & 0xf0) != 0x20) {
157 cradle_outb (0, base, CRADLE_SIO_INDEX);
158 cradle_outb (0, base, CRADLE_SIO_DATA);
161 /* set back to bank 0 */
162 cradle_outb (0, base, 0x3f8 + 0x3);
163 set_led (led, GREEN);
168 * Miscelaneous platform dependent initialisations
172 /**********************************************************/
173 board_late_init (void)
174 /**********************************************************/
180 /**********************************************************/
182 /**********************************************************/
184 DECLARE_GLOBAL_DATA_PTR;
186 led_code (0xf, YELLOW);
188 /* arch number of HHP Cradle */
189 gd->bd->bi_arch_number = 174;
191 /* adress of boot parameters */
192 gd->bd->bi_boot_params = 0xa0000100;
194 /* Init SIOs to enable SCC2 */
195 udelay (100000); /* delay makes it look neat */
196 init_sio (0, CRADLE_SIO1_PHYS);
198 init_sio (1, CRADLE_SIO2_PHYS);
200 init_sio (2, CRADLE_SIO3_PHYS);
208 /**********************************************************/
210 /**********************************************************/
212 DECLARE_GLOBAL_DATA_PTR;
214 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
215 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
216 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
217 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
218 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
219 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
220 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
221 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
223 return (PHYS_SDRAM_1_SIZE +