2 * (C) Copyright 2006 DENX Software Engineering
4 * SPDX-License-Identifier: GPL-2.0+
10 #if defined(CONFIG_CMD_NAND)
15 * hardware specific access to control-lines
16 * function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
18 static void ppchameleonevb_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
20 struct nand_chip *this = mtd->priv;
21 ulong base = (ulong) this->IO_ADDR_W;
23 if (ctrl & NAND_CTRL_CHANGE) {
24 if ( ctrl & NAND_CLE )
25 MACRO_NAND_CTL_SETCLE((unsigned long)base);
27 MACRO_NAND_CTL_CLRCLE((unsigned long)base);
28 if ( ctrl & NAND_ALE )
29 MACRO_NAND_CTL_CLRCLE((unsigned long)base);
31 MACRO_NAND_CTL_CLRALE((unsigned long)base);
32 if ( ctrl & NAND_NCE )
33 MACRO_NAND_ENABLE_CE((unsigned long)base);
35 MACRO_NAND_DISABLE_CE((unsigned long)base);
38 if (cmd != NAND_CMD_NONE)
39 writeb(cmd, this->IO_ADDR_W);
44 * read device ready pin
45 * function +/- borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
47 static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
49 struct nand_chip *this = mtdinfo->priv;
52 /* use the base addr to find out which chip are we dealing with */
53 switch((ulong) this->IO_ADDR_W) {
54 case CONFIG_SYS_NAND0_BASE:
55 rb_gpio_pin = CONFIG_SYS_NAND0_RDY;
57 case CONFIG_SYS_NAND1_BASE:
58 rb_gpio_pin = CONFIG_SYS_NAND1_RDY;
60 default: /* this should never happen */
65 if (in32(GPIO0_IR) & rb_gpio_pin)
72 * Board-specific NAND initialization. The following members of the
73 * argument are board-specific (per include/linux/mtd/nand.h):
74 * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
75 * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
76 * - cmd_ctrl: hardwarespecific function for accesing control-lines
77 * - dev_ready: hardwarespecific function for accesing device ready/busy line
78 * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
79 * only be provided if a hardware ECC is available
80 * - ecc.mode: mode of ecc, see defines
81 * - chip_delay: chip dependent delay for transfering data from array to
83 * - options: various chip options. They can partly be set to inform
84 * nand_scan about special functionality. See the defines for further
86 * Members with a "?" were not set in the merged testing-NAND branch,
87 * so they are not set here either.
89 int board_nand_init(struct nand_chip *nand)
92 nand->cmd_ctrl = ppchameleonevb_hwcontrol;
93 nand->dev_ready = ppchameleonevb_device_ready;
94 nand->ecc.mode = NAND_ECC_SOFT;
95 nand->chip_delay = NAND_BIG_DELAY_US;
96 nand->options = NAND_SAMSUNG_LP_OPTIONS;