2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on da830evm.c. Original Copyrights follow:
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <spi_flash.h>
30 #include <asm/arch/hardware.h>
31 #include <asm/arch/emif_defs.h>
32 #include <asm/arch/emac_defs.h>
33 #include <asm/arch/pinmux_defs.h>
35 #include <asm/arch/davinci_misc.h>
36 #include <asm/errno.h>
39 DECLARE_GLOBAL_DATA_PTR;
41 #ifdef CONFIG_DRIVER_TI_EMAC
42 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
47 #endif /* CONFIG_DRIVER_TI_EMAC */
49 #define CFG_MAC_ADDR_SPI_BUS 0
50 #define CFG_MAC_ADDR_SPI_CS 0
51 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
52 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
54 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
56 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
57 static int get_mac_addr(u8 *addr)
59 struct spi_flash *flash;
62 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
63 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
65 printf("Error - unable to probe SPI flash.\n");
69 ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr);
71 printf("Error - unable to read MAC address from SPI flash.\n");
79 void dsp_lpsc_on(unsigned domain, unsigned int id)
81 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
82 struct davinci_psc_regs *psc_regs;
84 psc_regs = davinci_psc0_regs;
85 mdstat = &psc_regs->psc0.mdstat[id];
86 mdctl = &psc_regs->psc0.mdctl[id];
87 ptstat = &psc_regs->ptstat;
88 ptcmd = &psc_regs->ptcmd;
90 while (*ptstat & (0x1 << domain))
93 if ((*mdstat & 0x1f) == 0x03)
94 return; /* Already on and enabled */
98 *ptcmd = 0x1 << domain;
100 while (*ptstat & (0x1 << domain))
102 while ((*mdstat & 0x1f) != 0x03)
103 ; /* Probably an overkill... */
106 static void dspwake(void)
108 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
111 /* if the device is ARM only, return */
112 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
115 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
118 *resetvect++ = 0x1E000; /* DSP Idle */
119 /* clear out the next 10 words as NOP */
120 memset(resetvect, 0, sizeof(unsigned) *10);
122 /* setup the DSP reset vector */
123 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
125 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
126 val = readl(PSC0_MDCTL + (15 * 4));
128 writel(val, (PSC0_MDCTL + (15 * 4)));
131 int misc_init_r(void)
135 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
137 uchar env_enetaddr[6];
140 enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
142 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
146 spi_mac_read = get_mac_addr(buff);
149 * MAC address not present in the environment
150 * try and read the MAC address from SPI flash
153 if (!enetaddr_found) {
155 if (is_valid_ether_addr(buff)) {
156 if (eth_setenv_enetaddr("ethaddr", buff)) {
157 printf("Warning: Failed to "
158 "set MAC address from SPI flash\n");
161 printf("Warning: Invalid "
162 "MAC address read from SPI flash\n");
167 * MAC address present in environment compare it with
168 * the MAC address in SPI flash and warn on mismatch
170 if (!spi_mac_read && is_valid_ether_addr(buff) &&
171 memcmp(env_enetaddr, buff, 6))
172 printf("Warning: MAC address in SPI flash don't match "
173 "with the MAC address in the environment\n");
174 printf("Default using MAC address from environment\n");
180 /* Read Ethernet MAC address from EEPROM */
181 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
184 * MAC address not present in the environment
185 * try and read the MAC address from EEPROM flash
188 if (!enetaddr_found) {
190 /* Set Ethernet MAC address from EEPROM */
191 davinci_sync_env_enetaddr(enetaddr);
194 * MAC address present in environment compare it with
195 * the MAC address in EEPROM and warn on mismatch
197 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
198 printf("Warning: MAC address in EEPROM don't match "
199 "with the MAC address in the environment\n");
200 printf("Default using MAC address from environment\n");
207 static const struct pinmux_config gpio_pins[] = {
208 #ifdef CONFIG_USE_NOR
209 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
210 { pinmux(0), 8, 4 }, /* GP0[11] */
214 const struct pinmux_resource pinmuxes[] = {
215 #ifdef CONFIG_DRIVER_TI_EMAC
216 PINMUX_ITEM(emac_pins_mdio),
217 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
218 PINMUX_ITEM(emac_pins_rmii),
220 PINMUX_ITEM(emac_pins_mii),
223 #ifdef CONFIG_SPI_FLASH
224 PINMUX_ITEM(spi1_pins_base),
225 PINMUX_ITEM(spi1_pins_scs0),
227 PINMUX_ITEM(uart2_pins_txrx),
228 PINMUX_ITEM(uart2_pins_rtscts),
229 PINMUX_ITEM(i2c0_pins),
230 #ifdef CONFIG_NAND_DAVINCI
231 PINMUX_ITEM(emifa_pins_cs3),
232 PINMUX_ITEM(emifa_pins_cs4),
233 PINMUX_ITEM(emifa_pins_nand),
234 #elif defined(CONFIG_USE_NOR)
235 PINMUX_ITEM(emifa_pins_cs2),
236 PINMUX_ITEM(emifa_pins_nor),
238 PINMUX_ITEM(gpio_pins),
241 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
243 const struct lpsc_resource lpsc[] = {
244 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
245 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
246 { DAVINCI_LPSC_EMAC }, /* image download */
247 { DAVINCI_LPSC_UART2 }, /* console */
248 { DAVINCI_LPSC_GPIO },
251 const int lpsc_size = ARRAY_SIZE(lpsc);
253 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
254 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
257 #define REV_AM18X_EVM 0x100
260 * get_board_rev() - setup to pass kernel board revision information
262 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
268 u32 get_board_rev(void)
271 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
274 s = getenv("maxcpuclk");
276 maxcpuclk = simple_strtoul(s, NULL, 10);
278 if (maxcpuclk >= 456000000)
280 else if (maxcpuclk >= 408000000)
282 else if (maxcpuclk >= 372000000)
284 #ifdef CONFIG_DA850_AM18X_EVM
285 rev |= REV_AM18X_EVM;
290 int board_early_init_f(void)
293 * Power on required peripherals
294 * ARM does not have access by default to PSC0 and PSC1
295 * assuming here that the DSP bootloader has set the IOPU
296 * such that PSC access is available to ARM
298 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
306 #ifdef CONFIG_USE_NOR
310 #ifndef CONFIG_USE_IRQ
314 #ifdef CONFIG_NAND_DAVINCI
316 * NAND CS setup - cycle counts based on da850evm NAND timings in the
317 * Linux kernel @ 25MHz EMIFA
319 writel((DAVINCI_ABCR_WSETUP(0) |
320 DAVINCI_ABCR_WSTROBE(1) |
321 DAVINCI_ABCR_WHOLD(0) |
322 DAVINCI_ABCR_RSETUP(0) |
323 DAVINCI_ABCR_RSTROBE(1) |
324 DAVINCI_ABCR_RHOLD(0) |
326 DAVINCI_ABCR_ASIZE_8BIT),
327 &davinci_emif_regs->ab2cr); /* CS3 */
330 /* arch number of the board */
331 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
333 /* address of boot parameters */
334 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
336 /* setup the SUSPSRC for ARM to control emulation suspend */
337 writel(readl(&davinci_syscfg_regs->suspsrc) &
338 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
339 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
340 DAVINCI_SYSCFG_SUSPSRC_UART2),
341 &davinci_syscfg_regs->suspsrc);
343 /* configure pinmux settings */
344 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
347 #ifdef CONFIG_USE_NOR
348 /* Set the GPIO direction as output */
349 clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
351 /* Set the output as low */
352 val = readl(GPIO_BANK0_REG_SET_ADDR);
354 writel(val, GPIO_BANK0_REG_CLR_ADDR);
357 #ifdef CONFIG_DRIVER_TI_EMAC
358 davinci_emac_mii_mode_sel(HAS_RMII);
359 #endif /* CONFIG_DRIVER_TI_EMAC */
361 /* enable the console UART */
362 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
363 DAVINCI_UART_PWREMU_MGMT_UTRST),
364 &davinci_uart2_ctrl_regs->pwremu_mgmt);
369 #ifdef CONFIG_DRIVER_TI_EMAC
371 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
375 * DA850/OMAP-L138 EVM can interface to a daughter card for
376 * additional features. This card has an I2C GPIO Expander TCA6416
377 * to select the required functions like camera, RMII Ethernet,
378 * character LCD, video.
380 * Initialization of the expander involves configuring the
381 * polarity and direction of the ports. P07-P05 are used here.
382 * These ports are connected to a Mux chip which enables only one
383 * functionality at a time.
385 * For RMII phy to respond, the MII MDIO clock has to be disabled
386 * since both the PHY devices have address as zero. The MII MDIO
387 * clock is controlled via GPIO2[6].
389 * This code is valid for Beta version of the hardware
391 int rmii_hw_init(void)
393 const struct pinmux_config gpio_pins[] = {
400 /* PinMux for GPIO */
401 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
404 /* I2C Exapnder configuration */
405 /* Set polarity to non-inverted */
408 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
410 printf("\nExpander @ 0x%02x write FAILED!!!\n",
411 CONFIG_SYS_I2C_EXPANDER_ADDR);
415 /* Configure P07-P05 as outputs */
418 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
420 printf("\nExpander @ 0x%02x write FAILED!!!\n",
421 CONFIG_SYS_I2C_EXPANDER_ADDR);
424 /* For Ethernet RMII selection
429 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
430 printf("\nExpander @ 0x%02x read FAILED!!!\n",
431 CONFIG_SYS_I2C_EXPANDER_ADDR);
435 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
436 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
437 printf("\nExpander @ 0x%02x write FAILED!!!\n",
438 CONFIG_SYS_I2C_EXPANDER_ADDR);
441 /* Set the output as high */
442 temp = REG(GPIO_BANK2_REG_SET_ADDR);
444 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
446 /* Set the GPIO direction as output */
447 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
448 temp &= ~(0x01 << 6);
449 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
453 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
456 * Initializes on-board ethernet controllers.
458 int board_eth_init(bd_t *bis)
460 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
461 /* Select RMII fucntion through the expander */
463 printf("RMII hardware init failed!!!\n");
465 if (!davinci_emac_initialize()) {
466 printf("Error: Ethernet init failed!\n");
472 #endif /* CONFIG_DRIVER_TI_EMAC */