2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on da830evm.c. Original Copyrights follow:
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <spi_flash.h>
30 #include <asm/arch/hardware.h>
31 #include <asm/arch/emif_defs.h>
32 #include <asm/arch/emac_defs.h>
33 #include <asm/arch/pinmux_defs.h>
35 #include <asm/arch/davinci_misc.h>
36 #include <asm/errno.h>
39 #ifdef CONFIG_DAVINCI_MMC
41 #include <asm/arch/sdmmc_defs.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 #ifdef CONFIG_DRIVER_TI_EMAC
47 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
52 #endif /* CONFIG_DRIVER_TI_EMAC */
54 #define CFG_MAC_ADDR_SPI_BUS 0
55 #define CFG_MAC_ADDR_SPI_CS 0
56 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
57 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
59 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
61 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
62 static int get_mac_addr(u8 *addr)
64 struct spi_flash *flash;
67 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
68 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
70 printf("Error - unable to probe SPI flash.\n");
74 ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr);
76 printf("Error - unable to read MAC address from SPI flash.\n");
84 void dsp_lpsc_on(unsigned domain, unsigned int id)
86 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
87 struct davinci_psc_regs *psc_regs;
89 psc_regs = davinci_psc0_regs;
90 mdstat = &psc_regs->psc0.mdstat[id];
91 mdctl = &psc_regs->psc0.mdctl[id];
92 ptstat = &psc_regs->ptstat;
93 ptcmd = &psc_regs->ptcmd;
95 while (*ptstat & (0x1 << domain))
98 if ((*mdstat & 0x1f) == 0x03)
99 return; /* Already on and enabled */
103 *ptcmd = 0x1 << domain;
105 while (*ptstat & (0x1 << domain))
107 while ((*mdstat & 0x1f) != 0x03)
108 ; /* Probably an overkill... */
111 static void dspwake(void)
113 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
116 /* if the device is ARM only, return */
117 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
120 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
123 *resetvect++ = 0x1E000; /* DSP Idle */
124 /* clear out the next 10 words as NOP */
125 memset(resetvect, 0, sizeof(unsigned) *10);
127 /* setup the DSP reset vector */
128 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
130 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
131 val = readl(PSC0_MDCTL + (15 * 4));
133 writel(val, (PSC0_MDCTL + (15 * 4)));
136 int misc_init_r(void)
140 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
142 uchar env_enetaddr[6];
145 enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
147 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
151 spi_mac_read = get_mac_addr(buff);
154 * MAC address not present in the environment
155 * try and read the MAC address from SPI flash
158 if (!enetaddr_found) {
160 if (is_valid_ether_addr(buff)) {
161 if (eth_setenv_enetaddr("ethaddr", buff)) {
162 printf("Warning: Failed to "
163 "set MAC address from SPI flash\n");
166 printf("Warning: Invalid "
167 "MAC address read from SPI flash\n");
172 * MAC address present in environment compare it with
173 * the MAC address in SPI flash and warn on mismatch
175 if (!spi_mac_read && is_valid_ether_addr(buff) &&
176 memcmp(env_enetaddr, buff, 6))
177 printf("Warning: MAC address in SPI flash don't match "
178 "with the MAC address in the environment\n");
179 printf("Default using MAC address from environment\n");
185 /* Read Ethernet MAC address from EEPROM */
186 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
189 * MAC address not present in the environment
190 * try and read the MAC address from EEPROM flash
193 if (!enetaddr_found) {
195 /* Set Ethernet MAC address from EEPROM */
196 davinci_sync_env_enetaddr(enetaddr);
199 * MAC address present in environment compare it with
200 * the MAC address in EEPROM and warn on mismatch
202 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
203 printf("Warning: MAC address in EEPROM don't match "
204 "with the MAC address in the environment\n");
205 printf("Default using MAC address from environment\n");
212 #ifdef CONFIG_DAVINCI_MMC
213 static struct davinci_mmc mmc_sd0 = {
214 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
215 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
216 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
217 .version = MMC_CTLR_VERSION_2,
220 int board_mmc_init(bd_t *bis)
222 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
224 /* Add slot-0 to mmc subsystem */
225 return davinci_mmc_init(bis, &mmc_sd0);
229 static const struct pinmux_config gpio_pins[] = {
230 #ifdef CONFIG_USE_NOR
231 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
232 { pinmux(0), 8, 4 }, /* GP0[11] */
234 #ifdef CONFIG_DAVINCI_MMC
235 /* GP0[11] is required for SD to work on Rev 3 EVMs */
236 { pinmux(0), 8, 4 }, /* GP0[11] */
240 const struct pinmux_resource pinmuxes[] = {
241 #ifdef CONFIG_DRIVER_TI_EMAC
242 PINMUX_ITEM(emac_pins_mdio),
243 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
244 PINMUX_ITEM(emac_pins_rmii),
246 PINMUX_ITEM(emac_pins_mii),
249 #ifdef CONFIG_SPI_FLASH
250 PINMUX_ITEM(spi1_pins_base),
251 PINMUX_ITEM(spi1_pins_scs0),
253 PINMUX_ITEM(uart2_pins_txrx),
254 PINMUX_ITEM(uart2_pins_rtscts),
255 PINMUX_ITEM(i2c0_pins),
256 #ifdef CONFIG_NAND_DAVINCI
257 PINMUX_ITEM(emifa_pins_cs3),
258 PINMUX_ITEM(emifa_pins_cs4),
259 PINMUX_ITEM(emifa_pins_nand),
260 #elif defined(CONFIG_USE_NOR)
261 PINMUX_ITEM(emifa_pins_cs2),
262 PINMUX_ITEM(emifa_pins_nor),
264 PINMUX_ITEM(gpio_pins),
265 #ifdef CONFIG_DAVINCI_MMC
266 PINMUX_ITEM(mmc0_pins),
270 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
272 const struct lpsc_resource lpsc[] = {
273 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
274 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
275 { DAVINCI_LPSC_EMAC }, /* image download */
276 { DAVINCI_LPSC_UART2 }, /* console */
277 { DAVINCI_LPSC_GPIO },
278 #ifdef CONFIG_DAVINCI_MMC
279 { DAVINCI_LPSC_MMC_SD },
283 const int lpsc_size = ARRAY_SIZE(lpsc);
285 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
286 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
289 #define REV_AM18X_EVM 0x100
292 * get_board_rev() - setup to pass kernel board revision information
294 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
300 u32 get_board_rev(void)
303 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
306 s = getenv("maxcpuclk");
308 maxcpuclk = simple_strtoul(s, NULL, 10);
310 if (maxcpuclk >= 456000000)
312 else if (maxcpuclk >= 408000000)
314 else if (maxcpuclk >= 372000000)
316 #ifdef CONFIG_DA850_AM18X_EVM
317 rev |= REV_AM18X_EVM;
322 int board_early_init_f(void)
325 * Power on required peripherals
326 * ARM does not have access by default to PSC0 and PSC1
327 * assuming here that the DSP bootloader has set the IOPU
328 * such that PSC access is available to ARM
330 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
338 #ifdef CONFIG_USE_NOR
342 #ifndef CONFIG_USE_IRQ
346 #ifdef CONFIG_NAND_DAVINCI
348 * NAND CS setup - cycle counts based on da850evm NAND timings in the
349 * Linux kernel @ 25MHz EMIFA
351 writel((DAVINCI_ABCR_WSETUP(0) |
352 DAVINCI_ABCR_WSTROBE(1) |
353 DAVINCI_ABCR_WHOLD(0) |
354 DAVINCI_ABCR_RSETUP(0) |
355 DAVINCI_ABCR_RSTROBE(1) |
356 DAVINCI_ABCR_RHOLD(0) |
358 DAVINCI_ABCR_ASIZE_8BIT),
359 &davinci_emif_regs->ab2cr); /* CS3 */
362 /* arch number of the board */
363 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
365 /* address of boot parameters */
366 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
368 /* setup the SUSPSRC for ARM to control emulation suspend */
369 writel(readl(&davinci_syscfg_regs->suspsrc) &
370 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
371 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
372 DAVINCI_SYSCFG_SUSPSRC_UART2),
373 &davinci_syscfg_regs->suspsrc);
375 /* configure pinmux settings */
376 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
379 #ifdef CONFIG_USE_NOR
380 /* Set the GPIO direction as output */
381 clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
383 /* Set the output as low */
384 val = readl(GPIO_BANK0_REG_SET_ADDR);
386 writel(val, GPIO_BANK0_REG_CLR_ADDR);
389 #ifdef CONFIG_DRIVER_TI_EMAC
390 davinci_emac_mii_mode_sel(HAS_RMII);
391 #endif /* CONFIG_DRIVER_TI_EMAC */
393 /* enable the console UART */
394 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
395 DAVINCI_UART_PWREMU_MGMT_UTRST),
396 &davinci_uart2_ctrl_regs->pwremu_mgmt);
401 #ifdef CONFIG_DRIVER_TI_EMAC
403 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
407 * DA850/OMAP-L138 EVM can interface to a daughter card for
408 * additional features. This card has an I2C GPIO Expander TCA6416
409 * to select the required functions like camera, RMII Ethernet,
410 * character LCD, video.
412 * Initialization of the expander involves configuring the
413 * polarity and direction of the ports. P07-P05 are used here.
414 * These ports are connected to a Mux chip which enables only one
415 * functionality at a time.
417 * For RMII phy to respond, the MII MDIO clock has to be disabled
418 * since both the PHY devices have address as zero. The MII MDIO
419 * clock is controlled via GPIO2[6].
421 * This code is valid for Beta version of the hardware
423 int rmii_hw_init(void)
425 const struct pinmux_config gpio_pins[] = {
432 /* PinMux for GPIO */
433 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
436 /* I2C Exapnder configuration */
437 /* Set polarity to non-inverted */
440 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
442 printf("\nExpander @ 0x%02x write FAILED!!!\n",
443 CONFIG_SYS_I2C_EXPANDER_ADDR);
447 /* Configure P07-P05 as outputs */
450 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
452 printf("\nExpander @ 0x%02x write FAILED!!!\n",
453 CONFIG_SYS_I2C_EXPANDER_ADDR);
456 /* For Ethernet RMII selection
461 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
462 printf("\nExpander @ 0x%02x read FAILED!!!\n",
463 CONFIG_SYS_I2C_EXPANDER_ADDR);
467 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
468 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
469 printf("\nExpander @ 0x%02x write FAILED!!!\n",
470 CONFIG_SYS_I2C_EXPANDER_ADDR);
473 /* Set the output as high */
474 temp = REG(GPIO_BANK2_REG_SET_ADDR);
476 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
478 /* Set the GPIO direction as output */
479 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
480 temp &= ~(0x01 << 6);
481 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
485 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
488 * Initializes on-board ethernet controllers.
490 int board_eth_init(bd_t *bis)
492 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
493 /* Select RMII fucntion through the expander */
495 printf("RMII hardware init failed!!!\n");
497 if (!davinci_emac_initialize()) {
498 printf("Error: Ethernet init failed!\n");
504 #endif /* CONFIG_DRIVER_TI_EMAC */