2 * DENX M53 DRAM init values
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not write to the Free Software
20 * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
23 * Refer docs/README.imxmage for more details about how-to configure
24 * and create imximage boot image
26 * The syntax is taken as close as possible with the kwbimage
28 #include <asm/imx-common/imximage.cfg>
34 /* Boot Offset 0x400, valid for both SD and NAND boot. */
35 BOOT_OFFSET FLASH_OFFSET_STANDARD
38 * Device Configuration Data (DCD)
40 * Each entry must have the format:
41 * Addr-type Address Value
44 * Addr-type register length (1,2 or 4 bytes)
45 * Address absolute address of the register
46 * value value to be stored in the register
48 DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */
49 DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */
50 DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */
51 DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */
53 DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */
54 DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */
55 DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */
57 DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */
58 DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */
59 DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */
61 DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */
62 DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */
63 DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */
65 DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */
66 DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */
67 DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */
69 DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK_0 */
70 DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK_1 */
72 DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */
73 DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */
74 DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDDS */
75 DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */
77 DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */
78 DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */
81 DATA 4 0x63fd9088 0x32383535
82 DATA 4 0x63fd9090 0x40383538
83 DATA 4 0x63fd907c 0x0136014d
84 DATA 4 0x63fd9080 0x01510141
86 DATA 4 0x63fd9018 0x00011740
87 DATA 4 0x63fd9000 0xc3190000
88 DATA 4 0x63fd900c 0x555952e3
89 DATA 4 0x63fd9010 0xb68e8b63
90 DATA 4 0x63fd9014 0x01ff00db
91 DATA 4 0x63fd902c 0x000026d2
92 DATA 4 0x63fd9030 0x009f0e21
93 DATA 4 0x63fd9008 0x12273030
94 DATA 4 0x63fd9004 0x0002002d
95 DATA 4 0x63fd901c 0x00008032
96 DATA 4 0x63fd901c 0x00008033
97 DATA 4 0x63fd901c 0x00028031
98 DATA 4 0x63fd901c 0x092080b0
99 DATA 4 0x63fd901c 0x04008040
100 DATA 4 0x63fd901c 0x0000803a
101 DATA 4 0x63fd901c 0x0000803b
102 DATA 4 0x63fd901c 0x00028039
103 DATA 4 0x63fd901c 0x09208138
104 DATA 4 0x63fd901c 0x04008048
105 DATA 4 0x63fd9020 0x00001800
106 DATA 4 0x63fd9040 0x04b80003
107 DATA 4 0x63fd9058 0x00022227
108 DATA 4 0x63fd901c 0x00000000