2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 * (C) Copyright 2001 ELTEC Elektronik AG
5 * Frank Gottschling <fgottschling@eltec.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 DECLARE_GLOBAL_DATA_PTR;
37 /*---------------------------------------------------------------------------*/
39 * Get Bus clock frequency
41 ulong bab7xx_get_bus_freq (void)
44 * The GPIO Port 1 on BAB7xx reflects the bus speed.
46 volatile struct GPIO *gpio =
47 (struct GPIO *) (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_GPIO_BASE);
49 unsigned char data = gpio->dta1;
57 /*---------------------------------------------------------------------------*/
60 * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
62 ulong bab7xx_get_gclk_freq (void)
64 static const int pllratio_to_factor[] = {
65 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
69 return pllratio_to_factor[get_hid1 () >> 28] *
70 (bab7xx_get_bus_freq () / 10);
73 /*----------------------------------------------------------------------------*/
77 uint pvr = get_pvr ();
79 printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
80 printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
81 bab7xx_get_bus_freq () / 1000000);
86 /* ------------------------------------------------------------------------- */
90 #ifdef CONFIG_SYS_ADDRESS_MAP_A
91 puts ("Board: ELTEC BAB7xx PReP\n");
93 puts ("Board: ELTEC BAB7xx CHRP\n");
98 /* ------------------------------------------------------------------------- */
100 int checkflash (void)
102 /* TODO: XXX XXX XXX */
103 printf ("2 MB ## Test not implemented yet ##\n");
107 /* ------------------------------------------------------------------------- */
110 static unsigned int mpc106_read_cfg_dword (unsigned int reg)
112 unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
114 out32r (MPC106_REG_ADDR, reg_addr);
116 return (in32r (MPC106_REG_DATA | (reg & 0x3)));
119 /* ------------------------------------------------------------------------- */
121 long int dram_size (int board_type)
123 /* No actual initialisation to do - done when setting up
124 * PICRs MCCRs ME/SARs etc in ram_init.S.
127 register unsigned long i, msar1, mear1, memSize;
129 #if defined(CONFIG_SYS_MEMTEST)
130 register unsigned long reg;
132 printf ("Testing DRAM\n");
134 /* write each mem addr with it's address */
135 for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4)
138 for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) {
145 * Since MPC106 memory controller chip has already been set to
146 * control all memory, just read and interpret its memory boundery register.
149 msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
150 mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
151 i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
154 if (i & 0x01) /* is bank enabled ? */
155 memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
161 return (memSize * 0x100000);
164 /* ------------------------------------------------------------------------- */
166 phys_size_t initdram (int board_type)
168 return dram_size (board_type);
171 /* ------------------------------------------------------------------------- */
173 void after_reloc (ulong dest_addr)
176 * Jump to the main U-Boot board init code
178 board_init_r ((gd_t *) gd, dest_addr);
181 /* ------------------------------------------------------------------------- */
184 * do_reset is done here because in this case it is board specific, since the
185 * 7xx CPUs can only be reset by external HW (the RTC in this case).
187 void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
189 #if defined(CONFIG_RTC_MK48T59)
190 /* trigger watchdog immediately */
191 rtc_set_watchdog (1, RTC_WD_RB_16TH);
193 #error "You must define the macro CONFIG_RTC_MK48T59."
197 /* ------------------------------------------------------------------------- */
199 #if defined(CONFIG_WATCHDOG)
201 * Since the 7xx CPUs don't have an internal watchdog, this function is
202 * board specific. We use the RTC here.
204 void watchdog_reset (void)
206 #if defined(CONFIG_RTC_MK48T59)
207 /* we use a 32 sec watchdog timer */
208 rtc_set_watchdog (8, RTC_WD_RB_4);
210 #error "You must define the macro CONFIG_RTC_MK48T59."
213 #endif /* CONFIG_WATCHDOG */
215 /* ------------------------------------------------------------------------- */
217 #ifdef CONFIG_CONSOLE_EXTRA_INFO
218 extern GraphicDevice smi;
220 void video_get_info_str (int line_number, char *info)
222 /* init video info strings for graphic console */
223 switch (line_number) {
225 sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
226 (get_pvr () >> 8) & 0xFF,
228 bab7xx_get_gclk_freq () / 1000000,
229 bab7xx_get_bus_freq () / 1000000);
233 " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
234 dram_size (0) / 0x100000, flash_init () / 0x100000);
237 sprintf (info, " %s", smi.modeIdent);
241 /* no more info lines */
247 /*---------------------------------------------------------------------------*/
249 int board_eth_init(bd_t *bis)
251 return pci_eth_init(bis);