2 * (C) Copyright 2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * PCI initialisation for the MPC10x.
34 struct pci_controller local_hose;
36 void pci_init_board(void)
38 struct pci_controller* hose = (struct pci_controller *)&local_hose;
42 hose->first_busno = 0;
43 hose->last_busno = 0xff;
45 pci_set_region(hose->regions + 0,
46 CONFIG_SYS_PCI_MEMORY_BUS,
47 CONFIG_SYS_PCI_MEMORY_PHYS,
49 * Attention: pci_hose_phys_to_bus() failes in address compare,
50 * so we need (CONFIG_SYS_PCI_MEMORY_SIZE-1)
52 CONFIG_SYS_PCI_MEMORY_SIZE-1,
53 PCI_REGION_MEM | PCI_REGION_MEMORY);
55 /* PCI memory space */
56 pci_set_region(hose->regions + 1,
57 CONFIG_SYS_PCI_MEM_BUS,
58 CONFIG_SYS_PCI_MEM_PHYS,
59 CONFIG_SYS_PCI_MEM_SIZE,
62 /* ISA/PCI memory space */
63 pci_set_region(hose->regions + 2,
64 CONFIG_SYS_ISA_MEM_BUS,
65 CONFIG_SYS_ISA_MEM_PHYS,
66 CONFIG_SYS_ISA_MEM_SIZE,
70 pci_set_region(hose->regions + 3,
71 CONFIG_SYS_PCI_IO_BUS,
72 CONFIG_SYS_PCI_IO_PHYS,
73 CONFIG_SYS_PCI_IO_SIZE,
76 /* ISA/PCI I/O space */
77 pci_set_region(hose->regions + 4,
78 CONFIG_SYS_ISA_IO_BUS,
79 CONFIG_SYS_ISA_IO_PHYS,
80 CONFIG_SYS_ISA_IO_SIZE,
83 hose->region_count = 5;
85 pci_setup_indirect(hose,
89 pci_register_hose(hose);
91 hose->last_busno = pci_hose_scan(hose);
93 /* Initialises the MPC10x PCI Configuration regs. */
94 pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR2, ®32);
95 reg32 |= PICR2_CF_SNOOP_WS(3) |
97 PICR2_CF_L2_HIT_DELAY(3) |
98 PICR2_CF_APHASE_WS(3);
99 reg32 &= ~(PICR2_L2_EN | PICR2_L2_UPDATE_EN);
100 pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR2, reg32);
102 pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, ®16);
103 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
104 pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16);
106 /* Clear non-reserved bits in status register */
107 pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff);
109 pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR1, ®32);
110 reg32 |= PICR1_CF_CBA(63) |
111 PICR1_CF_BREAD_WS(2) |
114 PICR1_PROC_TYPE_604 |
115 PICR1_CF_LOOP_SNOOP |
117 pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR1, reg32);
120 #endif /* CONFIG_PCI */