3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 /*****************************************************************************
32 * initialize SDRAM/DDRAM controller.
33 * TBD: get data from I2C EEPROM
34 *****************************************************************************/
35 long int initdram (int board_type)
44 #define MODE_EN 0x80000000
48 /* configure SDRAM start/end */
49 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (CFG_SDRAM_BASE & 0xFFF00000) | CFG_DRAM_RAM_SIZE;
50 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
52 /* setup config registers */
53 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = CFG_DRAM_CONFIG1;
54 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = CFG_DRAM_CONFIG2;
56 /* unlock mode register */
57 *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN;
58 /* precharge all banks */
59 *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
61 /* set extended mode register */
62 *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_EMODE;
64 /* set mode register */
65 *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE | 0x0400;
66 /* precharge all banks */
67 *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
69 *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_REF;
70 /* set mode register */
71 *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE;
72 /* normal operation */
73 *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL;
74 /* write default TAP delay */
75 *(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
78 for (tap_del = 0; tap_del < 32; tap_del++)
80 *(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
82 printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
83 for (t = 0; t < 0x04000000; t+=4)
85 printf ("Checking DRAM...\n");
86 for (t = 0; t < 0x04000000; t+=4)
88 ulong rval = *(vu_long *) t;
91 printf ("mismatch at %x: ", t);
92 printf (" 1.read %x", rval);
93 printf (" 2.read %x", *(vu_long *) t);
94 printf (" 3.read %x", *(vu_long *) t);
100 #endif /* CFG_RAMBOOT */
102 dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
104 /* return total ram size */
108 /*****************************************************************************
109 * print board identification
110 *****************************************************************************/
111 int checkboard (void)
113 #if defined (CONFIG_EVAL5200)
114 puts ("Board: EMK TOP5200 on EVAL5200\n");
116 #if defined (CONFIG_MINI5200)
117 puts ("Board: EMK TOP5200 on MINI5200\n");
119 puts ("Board: EMK TOP5200\n");
125 /*****************************************************************************
126 * prepare for FLASH detection
127 *****************************************************************************/
128 void flash_preinit(void)
131 * Now, when we are in RAM, enable flash write
132 * access for detection process.
133 * Note that CS_BOOT cannot be cleared when
134 * executing in flash.
136 *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
139 /*****************************************************************************
140 * finalize FLASH setup
141 *****************************************************************************/
142 void flash_afterinit(uint bank, ulong start, ulong size)
144 if (bank == 0) { /* adjust mapping */
145 *(vu_long *)MPC5XXX_BOOTCS_START =
146 *(vu_long *)MPC5XXX_CS0_START = START_REG(start);
147 *(vu_long *)MPC5XXX_BOOTCS_STOP =
148 *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(start, size);
152 /*****************************************************************************
153 * otherinits after RAM is there and we are relocated to RAM
154 * note: though this is an int function, nobody cares for the result!
155 *****************************************************************************/
156 int misc_init_r (void)
158 /* read 'factory' part of EEPROM */
165 /* get length first */
166 addr = CFG_FACT_OFFSET;
167 if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) {
169 printf ("cannot read factory configuration\n");
170 printf ("be sure to set ethaddr yourself!\n");
173 length = buf[0] + (buf[1] << 8);
177 if (length < 20 || length > CFG_FACT_SIZE - 2)
183 len = length > 80 ? 80 : length;
184 if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
186 /* mark end of buffer */
188 /* search end of line */
189 for (p = buf; *p && *p != 0x0a; p++);
193 /* advance to next line start */
196 /*printf ("%s\n", buf); */
197 /* search for our specific entry */
198 if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) {
199 setenv ("ethaddr", buf + 19);
200 } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) {
201 setenv ("serial#", buf + 15);
202 } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) {
203 setenv ("board_id", buf + 13);
209 /*****************************************************************************
210 * initialize the PCI system
211 *****************************************************************************/
213 static struct pci_controller hose;
215 extern void pci_mpc5xxx_init(struct pci_controller *);
217 void pci_init_board(void)
219 pci_mpc5xxx_init(&hose);