3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/processor.h>
10 #include <asm/cache.h>
14 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
15 * The width of the port and the width of the chips are determined at initialization.
16 * These widths are used to calculate the address for access CFI data structures.
17 * It has been tested on an Intel Strataflash implementation.
20 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
21 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
22 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
23 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
26 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
27 * Add support for other command sets Use the PRI and ALT to determine command set
28 * Verify erase and program timeouts.
31 #define FLASH_CMD_CFI 0x98
32 #define FLASH_CMD_READ_ID 0x90
33 #define FLASH_CMD_RESET 0xff
34 #define FLASH_CMD_BLOCK_ERASE 0x20
35 #define FLASH_CMD_ERASE_CONFIRM 0xD0
36 #define FLASH_CMD_WRITE 0x40
37 #define FLASH_CMD_PROTECT 0x60
38 #define FLASH_CMD_PROTECT_SET 0x01
39 #define FLASH_CMD_PROTECT_CLEAR 0xD0
40 #define FLASH_CMD_CLEAR_STATUS 0x50
41 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
42 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
44 #define FLASH_STATUS_DONE 0x80
45 #define FLASH_STATUS_ESS 0x40
46 #define FLASH_STATUS_ECLBS 0x20
47 #define FLASH_STATUS_PSLBS 0x10
48 #define FLASH_STATUS_VPENS 0x08
49 #define FLASH_STATUS_PSS 0x04
50 #define FLASH_STATUS_DPS 0x02
51 #define FLASH_STATUS_R 0x01
52 #define FLASH_STATUS_PROTECT 0x01
54 #define FLASH_OFFSET_CFI 0x55
55 #define FLASH_OFFSET_CFI_RESP 0x10
56 #define FLASH_OFFSET_WTOUT 0x1F
57 #define FLASH_OFFSET_WBTOUT 0x20
58 #define FLASH_OFFSET_ETOUT 0x21
59 #define FLASH_OFFSET_CETOUT 0x22
60 #define FLASH_OFFSET_WMAX_TOUT 0x23
61 #define FLASH_OFFSET_WBMAX_TOUT 0x24
62 #define FLASH_OFFSET_EMAX_TOUT 0x25
63 #define FLASH_OFFSET_CEMAX_TOUT 0x26
64 #define FLASH_OFFSET_SIZE 0x27
65 #define FLASH_OFFSET_INTERFACE 0x28
66 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
67 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
68 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
69 #define FLASH_OFFSET_PROTECT 0x02
70 #define FLASH_OFFSET_USER_PROTECTION 0x85
71 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
73 #define FLASH_MAN_CFI 0x01000000
87 #define NUM_ERASE_REGIONS 4
89 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
91 /*-----------------------------------------------------------------------
95 static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c);
96 static void flash_make_cmd(flash_info_t * info, uchar cmd, void *cmdbuf);
97 static void flash_write_cmd(flash_info_t * info, int sect, uchar offset,
99 static int flash_isequal(flash_info_t * info, int sect, uchar offset,
101 static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
102 static int flash_detect_cfi(flash_info_t * info);
103 static ulong flash_get_size(ulong base, int banknum);
104 static int flash_write_cfiword(flash_info_t * info, ulong dest,
106 static int flash_full_status_check(flash_info_t * info, ulong sector,
107 ulong tout, char *prompt);
108 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
109 static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
112 /*-----------------------------------------------------------------------
113 * create an address based on the offset and the port width
115 inline uchar *flash_make_addr(flash_info_t * info, int sect, int offset)
117 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
120 /*-----------------------------------------------------------------------
121 * read a character at a port width address
123 inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
126 cp = flash_make_addr(info, 0, offset);
127 return (cp[info->portwidth - 1]);
130 /*-----------------------------------------------------------------------
131 * read a short word by swapping for ppc format.
133 ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
137 addr = flash_make_addr(info, sect, offset);
138 return ((addr[(2 * info->portwidth) - 1] << 8) |
139 addr[info->portwidth - 1]);
143 /*-----------------------------------------------------------------------
144 * read a long word by picking the least significant byte of each maiximum
145 * port size word. Swap for ppc format.
147 ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
151 addr = flash_make_addr(info, sect, offset);
152 return ((addr[(2 * info->portwidth) - 1] << 24) |
153 (addr[(info->portwidth) - 1] << 16) |
154 (addr[(4 * info->portwidth) - 1] << 8) |
155 addr[(3 * info->portwidth) - 1]);
159 /*-----------------------------------------------------------------------
161 unsigned long flash_init(void)
165 unsigned long address;
167 /* The flash is positioned back to back, with the demultiplexing of the chip
168 * based on the A24 address line.
172 address = CONFIG_SYS_FLASH_BASE;
175 /* Init: no FLASHes known */
176 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
177 flash_info[i].flash_id = FLASH_UNKNOWN;
178 size += flash_info[i].size = flash_get_size(address, i);
179 address += CONFIG_SYS_FLASH_INCREMENT;
180 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
182 ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
183 i, flash_info[0].size, flash_info[i].size << 20);
187 #if 0 /* test-only */
188 /* Monitor protection ON by default */
189 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
191 flash_info[0].start[i] < CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1;
193 (void)flash_real_protect(&flash_info[0], i, 1);
200 /*-----------------------------------------------------------------------
202 int flash_erase(flash_info_t * info, int s_first, int s_last)
208 if (info->flash_id != FLASH_MAN_CFI) {
209 printf("Can't erase unknown flash type - aborted\n");
212 if ((s_first < 0) || (s_first > s_last)) {
213 printf("- no sectors to erase\n");
218 for (sect = s_first; sect <= s_last; ++sect) {
219 if (info->protect[sect]) {
224 printf("- Warning: %d protected sectors will not be erased!\n",
230 for (sect = s_first; sect <= s_last; sect++) {
231 if (info->protect[sect] == 0) { /* not protected */
232 flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
233 flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
234 flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
236 if (flash_full_status_check
237 (info, sect, info->erase_blk_tout, "erase")) {
247 /*-----------------------------------------------------------------------
249 void flash_print_info(flash_info_t * info)
253 if (info->flash_id != FLASH_MAN_CFI) {
254 printf("missing or unknown FLASH type\n");
258 printf("CFI conformant FLASH (%d x %d)",
259 (info->portwidth << 3), (info->chipwidth << 3));
260 printf(" Size: %ld MB in %d Sectors\n",
261 info->size >> 20, info->sector_count);
263 (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
264 info->erase_blk_tout, info->write_tout, info->buffer_write_tout,
267 printf(" Sector Start Addresses:");
268 for (i = 0; i < info->sector_count; ++i) {
272 info->start[i], info->protect[i] ? " (RO)" : " ");
278 /*-----------------------------------------------------------------------
279 * Copy memory to flash, returns:
282 * 2 - Flash not erased
284 int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
292 /* get lower aligned address */
293 wp = (addr & ~(info->portwidth - 1));
295 /* handle unaligned start */
296 if ((aln = addr - wp) != 0) {
299 for (i = 0; i < aln; ++i, ++cp)
300 flash_add_byte(info, &cword, (*(uchar *) cp));
302 for (; (i < info->portwidth) && (cnt > 0); i++) {
303 flash_add_byte(info, &cword, *src++);
307 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
308 flash_add_byte(info, &cword, (*(uchar *) cp));
309 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
313 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
314 while (cnt >= info->portwidth) {
315 i = info->buffer_size > cnt ? cnt : info->buffer_size;
316 if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
323 /* handle the aligned part */
324 while (cnt >= info->portwidth) {
326 for (i = 0; i < info->portwidth; i++) {
327 flash_add_byte(info, &cword, *src++);
329 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
331 wp += info->portwidth;
332 cnt -= info->portwidth;
334 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
340 * handle unaligned tail bytes
343 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
344 flash_add_byte(info, &cword, *src++);
347 for (; i < info->portwidth; ++i, ++cp) {
348 flash_add_byte(info, &cword, (*(uchar *) cp));
351 return flash_write_cfiword(info, wp, cword);
354 /*-----------------------------------------------------------------------
356 int flash_real_protect(flash_info_t * info, long sector, int prot)
360 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
361 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
363 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
365 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
368 flash_full_status_check(info, sector, info->erase_blk_tout,
369 prot ? "protect" : "unprotect")) == 0) {
371 info->protect[sector] = prot;
372 /* Intel's unprotect unprotects all locking */
375 for (i = 0; i < info->sector_count; i++) {
376 if (info->protect[i])
377 flash_real_protect(info, i, 1);
385 /*-----------------------------------------------------------------------
386 * wait for XSR.7 to be set. Time out with an error if it does not.
387 * This routine does not set the flash to read-array mode.
389 static int flash_status_check(flash_info_t * info, ulong sector, ulong tout,
394 /* Wait for command completion */
395 start = get_timer(0);
396 while (!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
397 if (get_timer(start) > info->erase_blk_tout) {
398 printf("Flash %s timeout at address %lx\n", prompt,
399 info->start[sector]);
400 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
407 /*-----------------------------------------------------------------------
408 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
409 * This routine sets the flash to read-array mode.
411 static int flash_full_status_check(flash_info_t * info, ulong sector,
412 ulong tout, char *prompt)
415 retcode = flash_status_check(info, sector, tout, prompt);
416 if ((retcode == ERR_OK)
417 && !flash_isequal(info, sector, 0, FLASH_STATUS_DONE)) {
419 printf("Flash %s error at address %lx\n", prompt,
420 info->start[sector]);
423 FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
424 printf("Command Sequence Error.\n");
425 } else if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)) {
426 printf("Block Erase Error.\n");
427 retcode = ERR_NOT_ERASED;
428 } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
429 printf("Locking Error\n");
431 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
432 printf("Block locked.\n");
433 retcode = ERR_PROTECTED;
435 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
436 printf("Vpp Low Error.\n");
438 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
442 /*-----------------------------------------------------------------------
444 static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
446 switch (info->portwidth) {
450 case FLASH_CFI_16BIT:
451 cword->w = (cword->w << 8) | c;
453 case FLASH_CFI_32BIT:
454 cword->l = (cword->l << 8) | c;
458 /*-----------------------------------------------------------------------
459 * make a proper sized command based on the port and chip widths
461 static void flash_make_cmd(flash_info_t * info, uchar cmd, void *cmdbuf)
464 uchar *cp = (uchar *) cmdbuf;
465 for (i = 0; i < info->portwidth; i++)
466 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
470 * Write a proper sized command to the correct address
472 static void flash_write_cmd(flash_info_t * info, int sect, uchar offset,
476 volatile cfiptr_t addr;
478 addr.cp = flash_make_addr(info, sect, offset);
479 flash_make_cmd(info, cmd, &cword);
480 switch (info->portwidth) {
484 case FLASH_CFI_16BIT:
487 case FLASH_CFI_32BIT:
493 /*-----------------------------------------------------------------------
495 static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
500 cptr.cp = flash_make_addr(info, sect, offset);
501 flash_make_cmd(info, cmd, &cword);
502 switch (info->portwidth) {
504 retval = (cptr.cp[0] == cword.c);
506 case FLASH_CFI_16BIT:
507 retval = (cptr.wp[0] == cword.w);
509 case FLASH_CFI_32BIT:
510 retval = (cptr.lp[0] == cword.l);
519 /*-----------------------------------------------------------------------
521 static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
526 cptr.cp = flash_make_addr(info, sect, offset);
527 flash_make_cmd(info, cmd, &cword);
528 switch (info->portwidth) {
530 retval = ((cptr.cp[0] & cword.c) == cword.c);
532 case FLASH_CFI_16BIT:
533 retval = ((cptr.wp[0] & cword.w) == cword.w);
535 case FLASH_CFI_32BIT:
536 retval = ((cptr.lp[0] & cword.l) == cword.l);
545 /*-----------------------------------------------------------------------
546 * detect if flash is compatible with the Common Flash Interface (CFI)
547 * http://www.jedec.org/download/search/jesd68.pdf
550 static int flash_detect_cfi(flash_info_t * info)
553 for (info->portwidth = FLASH_CFI_8BIT;
554 info->portwidth <= FLASH_CFI_32BIT; info->portwidth <<= 1) {
555 for (info->chipwidth = FLASH_CFI_BY8;
556 info->chipwidth <= info->portwidth;
557 info->chipwidth <<= 1) {
558 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
559 flash_write_cmd(info, 0, FLASH_OFFSET_CFI,
561 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
562 && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1,
564 && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2,
573 * The following code cannot be run from FLASH!
576 static ulong flash_get_size(ulong base, int banknum)
578 flash_info_t *info = &flash_info[banknum];
581 unsigned long sector;
584 uchar num_erase_regions;
585 int erase_region_size;
586 int erase_region_count;
588 info->start[0] = base;
590 invalidate_dcache_range(base, base + 0x400);
592 if (flash_detect_cfi(info)) {
594 size_ratio = info->portwidth / info->chipwidth;
596 flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
600 for (i = 0; i < num_erase_regions; i++) {
601 if (i > NUM_ERASE_REGIONS) {
602 printf("%d erase regions found, only %d used\n",
603 num_erase_regions, NUM_ERASE_REGIONS);
607 flash_read_long(info, 0,
608 FLASH_OFFSET_ERASE_REGIONS);
610 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
612 erase_region_count = (tmp & 0xffff) + 1;
613 for (j = 0; j < erase_region_count; j++) {
614 info->start[sect_cnt] = sector;
615 sector += (erase_region_size * size_ratio);
616 info->protect[sect_cnt] =
617 flash_isset(info, sect_cnt,
618 FLASH_OFFSET_PROTECT,
619 FLASH_STATUS_PROTECT);
624 info->sector_count = sect_cnt;
625 /* multiply the size by the number of chips */
627 (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) *
630 (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
631 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
632 info->erase_blk_tout =
634 (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
635 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
636 info->buffer_write_tout =
638 (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
639 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
642 (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT))) /
644 info->flash_id = FLASH_MAN_CFI;
647 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
649 printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
652 printf("found %d erase regions\n", num_erase_regions);
655 printf("size=%08x sectors=%08x \n", info->size, info->sector_count);
660 /*-----------------------------------------------------------------------
662 static int flash_write_cfiword(flash_info_t * info, ulong dest, cfiword_t cword)
668 cptr.cp = (uchar *)dest;
670 /* Check if Flash is (sufficiently) erased */
671 switch (info->portwidth) {
673 flag = ((cptr.cp[0] & cword.c) == cword.c);
675 case FLASH_CFI_16BIT:
676 flag = ((cptr.wp[0] & cword.w) == cword.w);
678 case FLASH_CFI_32BIT:
679 flag = ((cptr.lp[0] & cword.l) == cword.l);
687 /* Disable interrupts which might cause a timeout here */
688 flag = disable_interrupts();
690 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
691 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
693 switch (info->portwidth) {
695 cptr.cp[0] = cword.c;
697 case FLASH_CFI_16BIT:
698 cptr.wp[0] = cword.w;
700 case FLASH_CFI_32BIT:
701 cptr.lp[0] = cword.l;
705 /* re-enable interrupts if necessary */
709 return flash_full_status_check(info, 0, info->write_tout, "write");
712 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
714 /* loop through the sectors from the highest address
715 * when the passed address is greater or equal to the sector address
718 static int find_sector(flash_info_t * info, ulong addr)
721 for (sector = info->sector_count - 1; sector >= 0; sector--) {
722 if (addr >= info->start[sector])
728 static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
735 volatile cfiptr_t src;
736 volatile cfiptr_t dst;
739 dst.cp = (uchar *) dest;
740 sector = find_sector(info, dest);
741 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
742 flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
743 if ((retcode = flash_status_check(info, sector, info->buffer_write_tout,
744 "write to buffer")) == ERR_OK) {
745 switch (info->portwidth) {
749 case FLASH_CFI_16BIT:
752 case FLASH_CFI_32BIT:
759 flash_write_cmd(info, sector, 0, (uchar) cnt - 1);
761 switch (info->portwidth) {
763 *dst.cp++ = *src.cp++;
765 case FLASH_CFI_16BIT:
766 *dst.wp++ = *src.wp++;
768 case FLASH_CFI_32BIT:
769 *dst.lp++ = *src.lp++;
776 flash_write_cmd(info, sector, 0,
777 FLASH_CMD_WRITE_BUFFER_CONFIRM);
779 flash_full_status_check(info, sector,
780 info->buffer_write_tout,
783 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
786 #endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */