git.sur5r.net Git - u-boot/blob - board/esd/cpci750/cpci750.c

   1 /*
   2  * (C) Copyright 2001
   3  * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  *
  23  * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
  24  * modifications for the cpci750 by reinhard.arlt@esd-electronics.com
  25  */
  26
  27 /*
  28  * cpci750.c - main board support/init for the esd cpci750.
  29  */
  30
  31 #include <common.h>
  32 #include <command.h>
  33 #include <74xx_7xx.h>
  34 #include "../../Marvell/include/memory.h"
  35 #include "../../Marvell/include/pci.h"
  36 #include "../../Marvell/include/mv_gen_reg.h"
  37 #include <net.h>
  38
  39 #include "eth.h"
  40 #include "mpsc.h"
  41 #include "i2c.h"
  42 #include "64360.h"
  43 #include "mv_regs.h"
  44
  45 #undef  DEBUG
  46 /*#define       DEBUG */
  47
  48 #ifdef CONFIG_PCI
  49 #define MAP_PCI
  50 #endif /* of CONFIG_PCI */
  51
  52 #ifdef DEBUG
  53 #define DP(x) x
  54 #else
  55 #define DP(x)
  56 #endif
  57
  58 static char show_config_tab[][15] = {{"PCI0DLL_2     "},  /* 31 */
  59                                      {"PCI0DLL_1     "},  /* 30 */
  60                                      {"PCI0DLL_0     "},  /* 29 */
  61                                      {"PCI1DLL_2     "},  /* 28 */
  62                                      {"PCI1DLL_1     "},  /* 27 */
  63                                      {"PCI1DLL_0     "},  /* 26 */
  64                                      {"BbEP2En       "},  /* 25 */
  65                                      {"SDRAMRdDataDel"},  /* 24 */
  66                                      {"SDRAMRdDel    "},  /* 23 */
  67                                      {"SDRAMSync     "},  /* 22 */
  68                                      {"SDRAMPipeSel_1"},  /* 21 */
  69                                      {"SDRAMPipeSel_0"},  /* 20 */
  70                                      {"SDRAMAddDel   "},  /* 19 */
  71                                      {"SDRAMClkSel   "},  /* 18 */
  72                                      {"Reserved(1!)  "},  /* 17 */
  73                                      {"PCIRty        "},  /* 16 */
  74                                      {"BootCSWidth_1 "},  /* 15 */
  75                                      {"BootCSWidth_0 "},  /* 14 */
  76                                      {"PCI1PadsCal   "},  /* 13 */
  77                                      {"PCI0PadsCal   "},  /* 12 */
  78                                      {"MultiMVId_1   "},  /* 11 */
  79                                      {"MultiMVId_0   "},  /* 10 */
  80                                      {"MultiGTEn     "},  /* 09 */
  81                                      {"Int60xArb     "},  /* 08 */
  82                                      {"CPUBusConfig_1"},  /* 07 */
  83                                      {"CPUBusConfig_0"},  /* 06 */
  84                                      {"DefIntSpc     "},  /* 05 */
  85                                      {0               },  /* 04 */
  86                                      {"SROMAdd_1     "},  /* 03 */
  87                                      {"SROMAdd_0     "},  /* 02 */
  88                                      {"DRAMPadCal    "},  /* 01 */
  89                                      {"SInitEn       "},  /* 00 */
  90                                      {0               },  /* 31 */
  91                                      {0               },  /* 30 */
  92                                      {0               },  /* 29 */
  93                                      {0               },  /* 28 */
  94                                      {0               },  /* 27 */
  95                                      {0               },  /* 26 */
  96                                      {0               },  /* 25 */
  97                                      {0               },  /* 24 */
  98                                      {0               },  /* 23 */
  99                                      {0               },  /* 22 */
 100                                      {"JTAGCalBy     "},  /* 21 */
 101                                      {"GB2Sel        "},  /* 20 */
 102                                      {"GB1Sel        "},  /* 19 */
 103                                      {"DRAMPLL_MDiv_5"},  /* 18 */
 104                                      {"DRAMPLL_MDiv_4"},  /* 17 */
 105                                      {"DRAMPLL_MDiv_3"},  /* 16 */
 106                                      {"DRAMPLL_MDiv_2"},  /* 15 */
 107                                      {"DRAMPLL_MDiv_1"},  /* 14 */
 108                                      {"DRAMPLL_MDiv_0"},  /* 13 */
 109                                      {"GB0Sel        "},  /* 12 */
 110                                      {"DRAMPLLPU     "},  /* 11 */
 111                                      {"DRAMPLL_HIKVCO"},  /* 10 */
 112                                      {"DRAMPLLNP     "},  /* 09 */
 113                                      {"DRAMPLL_NDiv_7"},  /* 08 */
 114                                      {"DRAMPLL_NDiv_6"},  /* 07 */
 115                                      {"CPUPadCal     "},  /* 06 */
 116                                      {"DRAMPLL_NDiv_5"},  /* 05 */
 117                                      {"DRAMPLL_NDiv_4"},  /* 04 */
 118                                      {"DRAMPLL_NDiv_3"},  /* 03 */
 119                                      {"DRAMPLL_NDiv_2"},  /* 02 */
 120                                      {"DRAMPLL_NDiv_1"},  /* 01 */
 121                                      {"DRAMPLL_NDiv_0"}}; /* 00 */
 122
 123 extern flash_info_t flash_info[];
 124
 125 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
 126 extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
 127
 128 /* ------------------------------------------------------------------------- */
 129
 130 /* this is the current GT register space location */
 131 /* it starts at CONFIG_SYS_DFL_GT_REGS but moves later to CONFIG_SYS_GT_REGS */
 132
 133 /* Unfortunately, we cant change it while we are in flash, so we initialize it
 134  * to the "final" value. This means that any debug_led calls before
 135  * board_early_init_f wont work right (like in cpu_init_f).
 136  * See also my_remap_gt_regs below. (NTL)
 137  */
 138
 139 void board_prebootm_init (void);
 140 unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS;
 141 int display_mem_map (void);
 142
 143 /* ------------------------------------------------------------------------- */
 144
 145 /*
 146  * This is a version of the GT register space remapping function that
 147  * doesn't touch globals (meaning, it's ok to run from flash.)
 148  *
 149  * Unfortunately, this has the side effect that a writable
 150  * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
 151  */
 152
 153 void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
 154 {
 155         u32 temp;
 156
 157         /* check and see if it's already moved */
 158
 159 /* original ppcboot 1.1.6 source
 160
 161         temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
 162         if ((temp & 0xffff) == new_loc >> 20)
 163                 return;
 164
 165         temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
 166                 0xffff0000) | (new_loc >> 20);
 167
 168         out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
 169
 170         while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
 171 original ppcboot 1.1.6 source end */
 172
 173         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
 174         if ((temp & 0xffff) == new_loc >> 16)
 175                 return;
 176
 177         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
 178                 0xffff0000) | (new_loc >> 16);
 179
 180         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
 181
 182         while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
 183 }
 184
 185 #ifdef CONFIG_PCI
 186
 187 static void gt_pci_config (void)
 188 {
 189         unsigned int stat;
 190         unsigned int val = 0x00fff864;  /* DINK32: BusNum 23:16,  DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
 191
 192         /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
 193          * config registers by writing ones to the bus and device.
 194          * We then update the Virtual register with the correct value for the bus and device.
 195          */
 196         if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) {    /*if  PCI-X */
 197                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
 198
 199                 GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
 200
 201                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
 202                 GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
 203                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
 204
 205         }
 206         if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) {    /*if  PCI-X */
 207                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
 208                 GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
 209
 210                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
 211                 GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
 212                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
 213         }
 214
 215         /* Enable master */
 216         PCI_MASTER_ENABLE (0, SELF);
 217         PCI_MASTER_ENABLE (1, SELF);
 218
 219         /* Enable PCI0/1 Mem0 and IO 0 disable all others */
 220         GT_REG_READ (BASE_ADDR_ENABLE, &stat);
 221         stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) | (1
 222                                                                              <<
 223                                                                              18);
 224         stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
 225         GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
 226
 227         /* ronen- add write to pci remap registers for 64460.
 228            in 64360 when writing to pci base go and overide remap automaticaly,
 229            in 64460 it doesn't */
 230         GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CONFIG_SYS_PCI0_IO_SPACE >> 16);
 231         GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CONFIG_SYS_PCI0_IO_SPACE_PCI >> 16);
 232         GT_REG_WRITE (PCI_0_IO_SIZE, (CONFIG_SYS_PCI0_IO_SIZE - 1) >> 16);
 233
 234         GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI0_MEM_BASE >> 16);
 235         GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI0_MEM_BASE >> 16);
 236         GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CONFIG_SYS_PCI0_MEM_SIZE - 1) >> 16);
 237
 238         GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CONFIG_SYS_PCI1_IO_SPACE >> 16);
 239         GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CONFIG_SYS_PCI1_IO_SPACE_PCI >> 16);
 240         GT_REG_WRITE (PCI_1_IO_SIZE, (CONFIG_SYS_PCI1_IO_SIZE - 1) >> 16);
 241
 242         GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI1_MEM_BASE >> 16);
 243         GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI1_MEM_BASE >> 16);
 244         GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CONFIG_SYS_PCI1_MEM_SIZE - 1) >> 16);
 245
 246         /* PCI interface settings */
 247         /* Timeout set to retry forever */
 248         GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
 249         GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
 250
 251         /* ronen - enable only CS0 and Internal reg!! */
 252         GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 253         GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 254
 255 /*ronen update the pci internal registers base address.*/
 256 #ifdef MAP_PCI
 257         for (stat = 0; stat <= PCI_HOST1; stat++)
 258                 pciWriteConfigReg (stat,
 259                                    PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
 260                                    SELF, CONFIG_SYS_GT_REGS);
 261 #endif
 262
 263 }
 264 #endif
 265
 266 /* Setup CPU interface paramaters */
 267 static void gt_cpu_config (void)
 268 {
 269         cpu_t cpu = get_cpu_type ();
 270         ulong tmp;
 271
 272         /* cpu configuration register */
 273         tmp = GTREGREAD (CPU_CONFIGURATION);
 274
 275         /* set the SINGLE_CPU bit  see MV64360 P.399 */
 276 #ifndef CONFIG_SYS_GT_DUAL_CPU          /* SINGLE_CPU seems to cause JTAG problems */
 277         tmp |= CPU_CONF_SINGLE_CPU;
 278 #endif
 279
 280         tmp &= ~CPU_CONF_AACK_DELAY_2;
 281
 282         tmp |= CPU_CONF_DP_VALID;
 283         tmp |= CPU_CONF_AP_VALID;
 284
 285         tmp |= CPU_CONF_PIPELINE;
 286
 287         GT_REG_WRITE (CPU_CONFIGURATION, tmp);  /* Marvell (VXWorks) writes 0x20220FF */
 288
 289         /* CPU master control register */
 290         tmp = GTREGREAD (CPU_MASTER_CONTROL);
 291
 292         tmp |= CPU_MAST_CTL_ARB_EN;
 293
 294         if ((cpu == CPU_7400) ||
 295             (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
 296
 297                 tmp |= CPU_MAST_CTL_CLEAN_BLK;
 298                 tmp |= CPU_MAST_CTL_FLUSH_BLK;
 299
 300         } else {
 301                 /* cleanblock must be cleared for CPUs
 302                  * that do not support this command (603e, 750)
 303                  * see Res#1 */
 304                 tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
 305                 tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
 306         }
 307         GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
 308 }
 309
 310 /*
 311  * board_early_init_f.
 312  *
 313  * set up gal. device mappings, etc.
 314  */
 315 int board_early_init_f (void)
 316 {
 317
 318         /*
 319          * set up the GT the way the kernel wants it
 320          * the call to move the GT register space will obviously
 321          * fail if it has already been done, but we're going to assume
 322          * that if it's not at the power-on location, it's where we put
 323          * it last time. (huber)
 324          */
 325
 326         my_remap_gt_regs (CONFIG_SYS_DFL_GT_REGS, CONFIG_SYS_GT_REGS);
 327
 328         /* No PCI in first release of Port To_do: enable it. */
 329 #ifdef CONFIG_PCI
 330         gt_pci_config ();
 331 #endif
 332         /* mask all external interrupt sources */
 333         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
 334         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
 335         /* new in MV6436x */
 336         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
 337         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
 338         /* --------------------- */
 339         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
 340         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
 341         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
 342         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
 343         /* does not exist in MV6436x
 344            GT_REG_WRITE(CPU_INT_0_MASK, 0);
 345            GT_REG_WRITE(CPU_INT_1_MASK, 0);
 346            GT_REG_WRITE(CPU_INT_2_MASK, 0);
 347            GT_REG_WRITE(CPU_INT_3_MASK, 0);
 348            --------------------- */
 349
 350
 351         /* ----- DEVICE BUS SETTINGS ------ */
 352
 353         /*
 354          * EVB
 355          * 0 - SRAM   ????
 356          * 1 - RTC      ????
 357          * 2 - UART     ????
 358          * 3 - Flash    checked 32Bit Intel Strata
 359          * boot - BootCS checked 8Bit 29LV040B
 360          *
 361          */
 362
 363         /*
 364          * the dual 7450 module requires burst access to the boot
 365          * device, so the serial rom copies the boot device to the
 366          * on-board sram on the eval board, and updates the correct
 367          * registers to boot from the sram. (device0)
 368          */
 369
 370         memoryMapDeviceSpace (DEVICE0, CONFIG_SYS_DEV0_SPACE, CONFIG_SYS_DEV0_SIZE);
 371         memoryMapDeviceSpace (DEVICE1, CONFIG_SYS_DEV1_SPACE, CONFIG_SYS_DEV1_SIZE);
 372         memoryMapDeviceSpace (DEVICE2, CONFIG_SYS_DEV2_SPACE, CONFIG_SYS_DEV2_SIZE);
 373         memoryMapDeviceSpace (DEVICE3, CONFIG_SYS_DEV3_SPACE, CONFIG_SYS_DEV3_SIZE);
 374
 375
 376         /* configure device timing */
 377         GT_REG_WRITE (DEVICE_BANK0PARAMETERS, CONFIG_SYS_DEV0_PAR);
 378         GT_REG_WRITE (DEVICE_BANK1PARAMETERS, CONFIG_SYS_DEV1_PAR);
 379         GT_REG_WRITE (DEVICE_BANK2PARAMETERS, CONFIG_SYS_DEV2_PAR);
 380         GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_DEV3_PAR);
 381
 382 #ifdef CONFIG_SYS_32BIT_BOOT_PAR        /* set port parameters for Flash device module access */
 383         /* detect if we are booting from the 32 bit flash */
 384         if (GTREGREAD (DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
 385                 /* 32 bit boot flash */
 386                 GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
 387                 GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS,
 388                               CONFIG_SYS_32BIT_BOOT_PAR);
 389         } else {
 390                 /* 8 bit boot flash */
 391                 GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR);
 392                 GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
 393         }
 394 #else
 395         /* 8 bit boot flash only */
 396 /*      GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);*/
 397 #endif
 398
 399
 400         gt_cpu_config ();
 401
 402         /* MPP setup */
 403         GT_REG_WRITE (MPP_CONTROL0, CONFIG_SYS_MPP_CONTROL_0);
 404         GT_REG_WRITE (MPP_CONTROL1, CONFIG_SYS_MPP_CONTROL_1);
 405         GT_REG_WRITE (MPP_CONTROL2, CONFIG_SYS_MPP_CONTROL_2);
 406         GT_REG_WRITE (MPP_CONTROL3, CONFIG_SYS_MPP_CONTROL_3);
 407
 408         GT_REG_WRITE (GPP_LEVEL_CONTROL, CONFIG_SYS_GPP_LEVEL_CONTROL);
 409         DEBUG_LED0_ON ();
 410         DEBUG_LED1_ON ();
 411         DEBUG_LED2_ON ();
 412
 413         return 0;
 414 }
 415
 416 /* various things to do after relocation */
 417
 418 int misc_init_r ()
 419 {
 420         icache_enable ();
 421 #ifdef CONFIG_SYS_L2
 422         l2cache_enable ();
 423 #endif
 424 #ifdef CONFIG_MPSC
 425
 426         mpsc_sdma_init ();
 427         mpsc_init2 ();
 428 #endif
 429
 430 #if 0
 431         /* disable the dcache and MMU */
 432         dcache_lock ();
 433 #endif
 434         if (flash_info[3].size < CONFIG_SYS_FLASH_INCREMENT) {
 435                 unsigned int flash_offset;
 436                 unsigned int l;
 437
 438                 flash_offset =  CONFIG_SYS_FLASH_INCREMENT - flash_info[3].size;
 439                 for (l = 0; l < CONFIG_SYS_MAX_FLASH_SECT; l++) {
 440                         if (flash_info[3].start[l] != 0) {
 441                               flash_info[3].start[l] += flash_offset;
 442                         }
 443                 }
 444                 flash_protect (FLAG_PROTECT_SET,
 445                                CONFIG_SYS_MONITOR_BASE,
 446                                CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
 447                                &flash_info[3]);
 448         }
 449         return 0;
 450 }
 451
 452 void after_reloc (ulong dest_addr, gd_t * gd)
 453 {
 454
 455   memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE, CONFIG_SYS_BOOT_SIZE);
 456
 457   display_mem_map ();
 458   /* now, jump to the main ppcboot board init code */
 459   board_init_r (gd, dest_addr);
 460   /* NOTREACHED */
 461 }
 462
 463 /* ------------------------------------------------------------------------- */
 464
 465 /*
 466  * Check Board Identity:
 467  *
 468  * right now, assume borad type. (there is just one...after all)
 469  */
 470
 471 int checkboard (void)
 472 {
 473         int l_type = 0;
 474
 475         printf ("BOARD: %s\n", CONFIG_SYS_BOARD_NAME);
 476         return (l_type);
 477 }
 478
 479 /* utility functions */
 480 void debug_led (int led, int mode)
 481 {
 482 }
 483
 484 int display_mem_map (void)
 485 {
 486         int i, j;
 487         unsigned int base, size, width;
 488
 489         /* SDRAM */
 490         printf ("SD (DDR) RAM\n");
 491         for (i = 0; i <= BANK3; i++) {
 492                 base = memoryGetBankBaseAddress (i);
 493                 size = memoryGetBankSize (i);
 494                 if (size != 0) {
 495                         printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
 496                                 i, base, size >> 20);
 497                 }
 498         }
 499 #ifdef CONFIG_PCI
 500         /* CPU's PCI windows */
 501         for (i = 0; i <= PCI_HOST1; i++) {
 502                 printf ("\nCPU's PCI %d windows\n", i);
 503                 base = pciGetSpaceBase (i, PCI_IO);
 504                 size = pciGetSpaceSize (i, PCI_IO);
 505                 printf ("      IO: base - 0x%08x\tsize - %dM bytes\n", base,
 506                         size >> 20);
 507                 for (j = 0;
 508                      j <=
 509                      PCI_REGION0
 510                      /*ronen currently only first PCI MEM is used 3 */ ;
 511                      j++) {
 512                         base = pciGetSpaceBase (i, j);
 513                         size = pciGetSpaceSize (i, j);
 514                         printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n", j, base, size >> 20);
 515                 }
 516         }
 517 #endif /* of CONFIG_PCI */
 518         /* Devices */
 519         printf ("\nDEVICES\n");
 520         for (i = 0; i <= DEVICE3; i++) {
 521                 base = memoryGetDeviceBaseAddress (i);
 522                 size = memoryGetDeviceSize (i);
 523                 width = memoryGetDeviceWidth (i) * 8;
 524                 printf ("DEV %d:  base - 0x%08x  size - %dM bytes\twidth - %d bits", i, base, size >> 20, width);
 525                 if (i == 0)
 526                         printf ("\t- FLASH\n");
 527                 else if (i == 1)
 528                         printf ("\t- FLASH\n");
 529                 else if (i == 2)
 530                         printf ("\t- FLASH\n");
 531                 else
 532                         printf ("\t- RTC/REGS/CAN\n");
 533         }
 534
 535         /* Bootrom */
 536         base = memoryGetDeviceBaseAddress (BOOT_DEVICE);        /* Boot */
 537         size = memoryGetDeviceSize (BOOT_DEVICE);
 538         width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
 539         printf (" BOOT:  base - 0x%08x  size - %dM bytes\twidth - %d bits\t- FLASH\n",
 540                 base, size >> 20, width);
 541         return (0);
 542 }
 543
 544 /*
 545  * Command loadpci: wait for signal from host and boot image.
 546  */
 547 int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 548 {
 549         volatile unsigned int *ptr;
 550         int count = 0;
 551         int count2 = 0;
 552         int status;
 553         char addr[16];
 554         char str[] = "\\|/-";
 555         char *local_args[2];
 556
 557         /*
 558          * Mark sync address
 559          */
 560         ptr = 0;
 561         ptr[0] = 0xffffffff;
 562         ptr[1] = 0xffffffff;
 563         puts("\nWaiting for image from pci host -");
 564
 565         /*
 566          * Wait for host to write the start address
 567          */
 568         while (*ptr == 0xffffffff) {
 569                 count++;
 570                 if (!(count % 100)) {
 571                         count2++;
 572                         putc(0x08); /* backspace */
 573                         putc(str[count2 % 4]);
 574                 }
 575
 576                 /* Abort if ctrl-c was pressed */
 577                 if (ctrlc()) {
 578                         puts("\nAbort\n");
 579                         return 0;
 580                 }
 581
 582                 udelay(1000);
 583         }
 584
 585         sprintf(addr, "%08x", *ptr);
 586         printf("\nBooting Image at addr 0x%s ...\n", addr);
 587         setenv("loadaddr", addr);
 588
 589         switch (ptr[1] == 0) {
 590         case 0:
 591                 /*
 592                  * Boot image via bootm
 593                  */
 594                 local_args[0] = argv[0];
 595                 local_args[1] = NULL;
 596                 status = do_bootm (cmdtp, 0, 1, local_args);
 597                 break;
 598         case 1:
 599                 /*
 600                  * Boot image via bootvx
 601                  */
 602                 local_args[0] = argv[0];
 603                 local_args[1] = NULL;
 604                 status = do_bootvx (cmdtp, 0, 1, local_args);
 605                 break;
 606         }
 607
 608         return 0;
 609 }
 610
 611 U_BOOT_CMD(
 612         loadpci,        1,      1,      do_loadpci,
 613         "loadpci - Wait for pci-image and boot it\n",
 614         NULL
 615         );
 616
 617 /* DRAM check routines copied from gw8260 */
 618
 619 #if defined (CONFIG_SYS_DRAM_TEST)
 620
 621 /*********************************************************************/
 622 /* NAME:  move64() -  moves a double word (64-bit)                   */
 623 /*                                                                   */
 624 /* DESCRIPTION:                                                      */
 625 /*   this function performs a double word move from the data at      */
 626 /*   the source pointer to the location at the destination pointer.  */
 627 /*                                                                   */
 628 /* INPUTS:                                                           */
 629 /*   unsigned long long *src  - pointer to data to move              */
 630 /*                                                                   */
 631 /* OUTPUTS:                                                          */
 632 /*   unsigned long long *dest - pointer to locate to move data       */
 633 /*                                                                   */
 634 /* RETURNS:                                                          */
 635 /*   None                                                            */
 636 /*                                                                   */
 637 /* RESTRICTIONS/LIMITATIONS:                                         */
 638 /*   May cloober fr0.                                                */
 639 /*                                                                   */
 640 /*********************************************************************/
 641 static void move64 (unsigned long long *src, unsigned long long *dest)
 642 {
 643         asm ("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
 644              "stfd 0, 0(4)"     /* *dest  =  fpr0       */
 645       : : : "fr0");             /* Clobbers fr0         */
 646         return;
 647 }
 648
 649
 650 #if defined (CONFIG_SYS_DRAM_TEST_DATA)
 651
 652 unsigned long long pattern[] = {
 653         0xaaaaaaaaaaaaaaaaLL,
 654         0xccccccccccccccccLL,
 655         0xf0f0f0f0f0f0f0f0LL,
 656         0xff00ff00ff00ff00LL,
 657         0xffff0000ffff0000LL,
 658         0xffffffff00000000LL,
 659         0x00000000ffffffffLL,
 660         0x0000ffff0000ffffLL,
 661         0x00ff00ff00ff00ffLL,
 662         0x0f0f0f0f0f0f0f0fLL,
 663         0x3333333333333333LL,
 664         0x5555555555555555LL,
 665 };
 666
 667 /*********************************************************************/
 668 /* NAME:  mem_test_data() -  test data lines for shorts and opens    */
 669 /*                                                                   */
 670 /* DESCRIPTION:                                                      */
 671 /*   Tests data lines for shorts and opens by forcing adjacent data  */
 672 /*   to opposite states. Because the data lines could be routed in   */
 673 /*   an arbitrary manner the must ensure test patterns ensure that   */
 674 /*   every case is tested. By using the following series of binary   */
 675 /*   patterns every combination of adjacent bits is test regardless  */
 676 /*   of routing.                                                     */
 677 /*                                                                   */
 678 /*     ...101010101010101010101010                                   */
 679 /*     ...110011001100110011001100                                   */
 680 /*     ...111100001111000011110000                                   */
 681 /*     ...111111110000000011111111                                   */
 682 /*                                                                   */
 683 /*   Carrying this out, gives us six hex patterns as follows:        */
 684 /*                                                                   */
 685 /*     0xaaaaaaaaaaaaaaaa                                            */
 686 /*     0xcccccccccccccccc                                            */
 687 /*     0xf0f0f0f0f0f0f0f0                                            */
 688 /*     0xff00ff00ff00ff00                                            */
 689 /*     0xffff0000ffff0000                                            */
 690 /*     0xffffffff00000000                                            */
 691 /*                                                                   */
 692 /*   The number test patterns will always be given by:               */
 693 /*                                                                   */
 694 /*   log(base 2)(number data bits) = log2 (64) = 6                   */
 695 /*                                                                   */
 696 /*   To test for short and opens to other signals on our boards. we  */
 697 /*   simply                                                          */
 698 /*   test with the 1's complemnt of the paterns as well.             */
 699 /*                                                                   */
 700 /* OUTPUTS:                                                          */
 701 /*   Displays failing test pattern                                   */
 702 /*                                                                   */
 703 /* RETURNS:                                                          */
 704 /*   0 -  Passed test                                                */
 705 /*   1 -  Failed test                                                */
 706 /*                                                                   */
 707 /* RESTRICTIONS/LIMITATIONS:                                         */
 708 /*  Assumes only one one SDRAM bank                                  */
 709 /*                                                                   */
 710 /*********************************************************************/
 711 int mem_test_data (void)
 712 {
 713         unsigned long long *pmem = (unsigned long long *) CONFIG_SYS_MEMTEST_START;
 714         unsigned long long temp64 = 0;
 715         int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
 716         int i;
 717         unsigned int hi, lo;
 718
 719         for (i = 0; i < num_patterns; i++) {
 720                 move64 (&(pattern[i]), pmem);
 721                 move64 (pmem, &temp64);
 722
 723                 /* hi = (temp64>>32) & 0xffffffff;              */
 724                 /* lo = temp64 & 0xffffffff;                    */
 725                 /* printf("\ntemp64 = 0x%08x%08x", hi, lo);     */
 726
 727                 hi = (pattern[i] >> 32) & 0xffffffff;
 728                 lo = pattern[i] & 0xffffffff;
 729                 /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo);  */
 730
 731                 if (temp64 != pattern[i]) {
 732                         printf ("\n   Data Test Failed, pattern 0x%08x%08x",
 733                                 hi, lo);
 734                         return 1;
 735                 }
 736         }
 737
 738         return 0;
 739 }
 740 #endif /* CONFIG_SYS_DRAM_TEST_DATA */
 741
 742 #if defined (CONFIG_SYS_DRAM_TEST_ADDRESS)
 743 /*********************************************************************/
 744 /* NAME:  mem_test_address() -  test address lines                   */
 745 /*                                                                   */
 746 /* DESCRIPTION:                                                      */
 747 /*   This function performs a test to verify that each word im       */
 748 /*   memory is uniquly addressable. The test sequence is as follows: */
 749 /*                                                                   */
 750 /*   1) write the address of each word to each word.                 */
 751 /*   2) verify that each location equals its address                 */
 752 /*                                                                   */
 753 /* OUTPUTS:                                                          */
 754 /*   Displays failing test pattern and address                       */
 755 /*                                                                   */
 756 /* RETURNS:                                                          */
 757 /*   0 -  Passed test                                                */
 758 /*   1 -  Failed test                                                */
 759 /*                                                                   */
 760 /* RESTRICTIONS/LIMITATIONS:                                         */
 761 /*                                                                   */
 762 /*                                                                   */
 763 /*********************************************************************/
 764 int mem_test_address (void)
 765 {
 766         volatile unsigned int *pmem =
 767                 (volatile unsigned int *) CONFIG_SYS_MEMTEST_START;
 768         const unsigned int size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 4;
 769         unsigned int i;
 770
 771         /* write address to each location */
 772         for (i = 0; i < size; i++) {
 773                 pmem[i] = i;
 774         }
 775
 776         /* verify each loaction */
 777         for (i = 0; i < size; i++) {
 778                 if (pmem[i] != i) {
 779                         printf ("\n   Address Test Failed at 0x%x", i);
 780                         return 1;
 781                 }
 782         }
 783         return 0;
 784 }
 785 #endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */
 786
 787 #if defined (CONFIG_SYS_DRAM_TEST_WALK)
 788 /*********************************************************************/
 789 /* NAME:   mem_march() -  memory march                               */
 790 /*                                                                   */
 791 /* DESCRIPTION:                                                      */
 792 /*   Marches up through memory. At each location verifies rmask if   */
 793 /*   read = 1. At each location write wmask if  write = 1. Displays  */
 794 /*   failing address and pattern.                                    */
 795 /*                                                                   */
 796 /* INPUTS:                                                           */
 797 /*   volatile unsigned long long * base - start address of test      */
 798 /*   unsigned int size - number of dwords(64-bit) to test            */
 799 /*   unsigned long long rmask - read verify mask                     */
 800 /*   unsigned long long wmask - wrtie verify mask                    */
 801 /*   short read - verifies rmask if read = 1                         */
 802 /*   short write  - writes wmask if write = 1                        */
 803 /*                                                                   */
 804 /* OUTPUTS:                                                          */
 805 /*   Displays failing test pattern and address                       */
 806 /*                                                                   */
 807 /* RETURNS:                                                          */
 808 /*   0 -  Passed test                                                */
 809 /*   1 -  Failed test                                                */
 810 /*                                                                   */
 811 /* RESTRICTIONS/LIMITATIONS:                                         */
 812 /*                                                                   */
 813 /*                                                                   */
 814 /*********************************************************************/
 815 int mem_march (volatile unsigned long long *base,
 816                unsigned int size,
 817                unsigned long long rmask,
 818                unsigned long long wmask, short read, short write)
 819 {
 820         unsigned int i;
 821         unsigned long long temp = 0;
 822         unsigned int hitemp, lotemp, himask, lomask;
 823
 824         for (i = 0; i < size; i++) {
 825                 if (read != 0) {
 826                         /* temp = base[i]; */
 827                         move64 ((unsigned long long *) &(base[i]), &temp);
 828                         if (rmask != temp) {
 829                                 hitemp = (temp >> 32) & 0xffffffff;
 830                                 lotemp = temp & 0xffffffff;
 831                                 himask = (rmask >> 32) & 0xffffffff;
 832                                 lomask = rmask & 0xffffffff;
 833
 834                                 printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
 835                                 return 1;
 836                         }
 837                 }
 838                 if (write != 0) {
 839                         /*  base[i] = wmask; */
 840                         move64 (&wmask, (unsigned long long *) &(base[i]));
 841                 }
 842         }
 843         return 0;
 844 }
 845 #endif /* CONFIG_SYS_DRAM_TEST_WALK */
 846
 847 /*********************************************************************/
 848 /* NAME:   mem_test_walk() -  a simple walking ones test             */
 849 /*                                                                   */
 850 /* DESCRIPTION:                                                      */
 851 /*   Performs a walking ones through entire physical memory. The     */
 852 /*   test uses as series of memory marches, mem_march(), to verify   */
 853 /*   and write the test patterns to memory. The test sequence is as  */
 854 /*   follows:                                                        */
 855 /*     1) march writing 0000...0001                                  */
 856 /*     2) march verifying 0000...0001  , writing  0000...0010        */
 857 /*     3) repeat step 2 shifting masks left 1 bit each time unitl    */
 858 /*         the write mask equals 1000...0000                         */
 859 /*     4) march verifying 1000...0000                                */
 860 /*   The test fails if any of the memory marches return a failure.   */
 861 /*                                                                   */
 862 /* OUTPUTS:                                                          */
 863 /*   Displays which pass on the memory test is executing             */
 864 /*                                                                   */
 865 /* RETURNS:                                                          */
 866 /*   0 -  Passed test                                                */
 867 /*   1 -  Failed test                                                */
 868 /*                                                                   */
 869 /* RESTRICTIONS/LIMITATIONS:                                         */
 870 /*                                                                   */
 871 /*                                                                   */
 872 /*********************************************************************/
 873 int mem_test_walk (void)
 874 {
 875         unsigned long long mask;
 876         volatile unsigned long long *pmem =
 877                 (volatile unsigned long long *) CONFIG_SYS_MEMTEST_START;
 878         const unsigned long size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 8;
 879
 880         unsigned int i;
 881
 882         mask = 0x01;
 883
 884         printf ("Initial Pass");
 885         mem_march (pmem, size, 0x0, 0x1, 0, 1);
 886
 887         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
 888         printf ("               ");
 889         printf ("         ");
 890         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
 891
 892         for (i = 0; i < 63; i++) {
 893                 printf ("Pass %2d", i + 2);
 894                 if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
 895                         /*printf("mask: 0x%x, pass: %d, ", mask, i); */
 896                         return 1;
 897                 }
 898                 mask = mask << 1;
 899                 printf ("\b\b\b\b\b\b\b");
 900         }
 901
 902         printf ("Last Pass");
 903         if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
 904                 /* printf("mask: 0x%x", mask); */
 905                 return 1;
 906         }
 907         printf ("\b\b\b\b\b\b\b\b\b");
 908         printf ("            ");
 909         printf ("\b\b\b\b\b\b\b\b\b");
 910
 911         return 0;
 912 }
 913
 914 /*********************************************************************/
 915 /* NAME:    testdram() -  calls any enabled memory tests             */
 916 /*                                                                   */
 917 /* DESCRIPTION:                                                      */
 918 /*   Runs memory tests if the environment test variables are set to  */
 919 /*   'y'.                                                            */
 920 /*                                                                   */
 921 /* INPUTS:                                                           */
 922 /*   testdramdata    - If set to 'y', data test is run.              */
 923 /*   testdramaddress - If set to 'y', address test is run.           */
 924 /*   testdramwalk    - If set to 'y', walking ones test is run       */
 925 /*                                                                   */
 926 /* OUTPUTS:                                                          */
 927 /*   None                                                            */
 928 /*                                                                   */
 929 /* RETURNS:                                                          */
 930 /*   0 -  Passed test                                                */
 931 /*   1 -  Failed test                                                */
 932 /*                                                                   */
 933 /* RESTRICTIONS/LIMITATIONS:                                         */
 934 /*                                                                   */
 935 /*                                                                   */
 936 /*********************************************************************/
 937 int testdram (void)
 938 {
 939         char *s;
 940         int rundata    = 0;
 941         int runaddress = 0;
 942         int runwalk    = 0;
 943
 944 #ifdef CONFIG_SYS_DRAM_TEST_DATA
 945         s = getenv ("testdramdata");
 946         rundata = (s && (*s == 'y')) ? 1 : 0;
 947 #endif
 948 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
 949         s = getenv ("testdramaddress");
 950         runaddress = (s && (*s == 'y')) ? 1 : 0;
 951 #endif
 952 #ifdef CONFIG_SYS_DRAM_TEST_WALK
 953         s = getenv ("testdramwalk");
 954         runwalk = (s && (*s == 'y')) ? 1 : 0;
 955 #endif
 956
 957         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
 958                 printf ("Testing RAM from 0x%08x to 0x%08x ...  (don't panic... that will take a moment !!!!)\n", CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END);
 959         }
 960 #ifdef CONFIG_SYS_DRAM_TEST_DATA
 961         if (rundata == 1) {
 962                 printf ("Test DATA ...  ");
 963                 if (mem_test_data () == 1) {
 964                         printf ("failed \n");
 965                         return 1;
 966                 } else
 967                         printf ("ok \n");
 968         }
 969 #endif
 970 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
 971         if (runaddress == 1) {
 972                 printf ("Test ADDRESS ...  ");
 973                 if (mem_test_address () == 1) {
 974                         printf ("failed \n");
 975                         return 1;
 976                 } else
 977                         printf ("ok \n");
 978         }
 979 #endif
 980 #ifdef CONFIG_SYS_DRAM_TEST_WALK
 981         if (runwalk == 1) {
 982                 printf ("Test WALKING ONEs ...  ");
 983                 if (mem_test_walk () == 1) {
 984                         printf ("failed \n");
 985                         return 1;
 986                 } else
 987                         printf ("ok \n");
 988         }
 989 #endif
 990         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
 991                 printf ("passed\n");
 992         }
 993         return 0;
 994
 995 }
 996 #endif /* CONFIG_SYS_DRAM_TEST */
 997
 998 /* ronen - the below functions are used by the bootm function           */
 999 /*  - we map the base register to fbe00000 (same mapping as in the LSP) */
1000 /*  - we turn off the RX gig dmas - to prevent the dma from overunning  */
1001 /*    the kernel data areas.                                            */
1002 /*  - we diable and invalidate the icache and dcache.                   */
1003 void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
1004 {
1005         u32 temp;
1006
1007         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
1008         if ((temp & 0xffff) == new_loc >> 16)
1009                 return;
1010
1011         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
1012                 0xffff0000) | (new_loc >> 16);
1013
1014         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
1015
1016         while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
1017                                                         new_loc |
1018                                                         (INTERNAL_SPACE_DECODE)))))
1019                != temp);
1020
1021 }
1022
1023 void board_prebootm_init ()
1024 {
1025
1026 /* change window size of PCI1 IO in order tp prevent overlaping with REG BASE. */
1027                 GT_REG_WRITE (PCI_1_IO_SIZE, (_64K - 1) >> 16);
1028
1029 /* Stop GigE Rx DMA engines */
1030         GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (0), 0x0000ff00);
1031 /*      GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (1), 0x0000ff00); */
1032 /*      GV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (2), 0x0000ff00); */
1033
1034 /* Relocate MV64360 internal regs */
1035         my_remap_gt_regs_bootm (CONFIG_SYS_GT_REGS, CONFIG_SYS_DFL_GT_REGS);
1036
1037         icache_disable ();
1038         dcache_disable ();
1039 }
1040
1041 int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1042 {
1043         unsigned int reset_sample_low;
1044         unsigned int reset_sample_high;
1045         unsigned int l, l1, l2;
1046
1047         GT_REG_READ(0x3c4, &reset_sample_low);
1048         GT_REG_READ(0x3d4, &reset_sample_high);
1049         printf("Reset configuration 0x%08x 0x%08x\n", reset_sample_low, reset_sample_high);
1050
1051         l2 = 0;
1052         for (l=0; l<63; l++) {
1053                 if (show_config_tab[l][0] != 0) {
1054                         printf("%14s:%1x ", show_config_tab[l],
1055                                ((reset_sample_low >> (31 - (l & 0x1f)))) & 0x01);
1056                         l2++;
1057                         if ((l2 % 4) == 0)
1058                                 printf("\n");
1059                 } else {
1060                         l1++;
1061                 }
1062                 if (l == 32)
1063                         reset_sample_low = reset_sample_high;
1064         }
1065         printf("\n");
1066
1067         return(0);
1068 }
1069
1070 U_BOOT_CMD(
1071         show_config,    1,      1,      do_show_config,
1072         "Show Marvell strapping register",
1073         "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)"
1074 );