3 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm-offsets.h>
9 #include <ppc_asm.tmpl>
16 * This table is used by the cpu boot code to setup the initial tlb
17 * entries. Rather than make broad assumptions in the cpu source tree,
18 * this table lets each board set things up however they like.
20 * Pointer to the table is returned in r1
29 * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
30 * speed up boot process. It is patched after relocation to enable SA_I
32 tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G )
34 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
35 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
36 tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G )
39 /* TLB-entry for PCI Memory */
40 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG )
41 tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG )
42 tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG )
43 tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG )
45 /* TLB-entry for PCI IO */
46 tlbentry( CONFIG_SYS_PCI_IOBASE, SZ_64K, CONFIG_SYS_PCI_IOBASE, 1, AC_RW | SA_IG )
48 /* TLB-entries for EBC: CPLD, DUMEM, DUIO */
49 tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RWX | SA_IG )
50 tlbentry( CONFIG_SYS_DUMEM_BASE, SZ_1M, CONFIG_SYS_DUMEM_BASE, 1, AC_RWX | SA_IG )
51 tlbentry( CONFIG_SYS_DUIO_BASE, SZ_64K, CONFIG_SYS_DUIO_BASE, 1, AC_RWX | SA_IG )
53 /* TLB-entry for NAND */
54 tlbentry( CONFIG_SYS_NAND0_ADDR, SZ_1K, CONFIG_SYS_NAND0_ADDR, 1, AC_RWX | SA_IG )
55 tlbentry( CONFIG_SYS_NAND1_ADDR, SZ_1K, CONFIG_SYS_NAND1_ADDR, 1, AC_RWX | SA_IG )
57 /* TLB-entry for Internal Registers & OCM */
58 tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I )
60 /* TLB-entry PCI registers */
61 tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG )
63 /* TLB-entry for peripherals */
64 tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG)