2 * (C) Copyright 2001-2003
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
29 /* ------------------------------------------------------------------------- */
35 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
37 /* fpga configuration data - gzip compressed and generated by bin2c */
38 const unsigned char fpgadata[] =
44 * include common fpga code (for esd boards)
46 #include "../common/fpga.c"
50 int gunzip(void *, int, unsigned char *, unsigned long *);
53 int board_early_init_f (void)
56 * IRQ 0-15 405GP internally generated; active high; level sensitive
57 * IRQ 16 405GP internally generated; active low; level sensitive
59 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
60 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
61 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
62 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
63 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
64 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
65 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
67 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
68 mtdcr(uicer, 0x00000000); /* disable all ints */
69 mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
70 mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */
71 mtdcr(uictr, 0x10000000); /* set int trigger levels */
72 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
73 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
76 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
78 mtebc (epcr, 0xa8400000); /* ebc always driven */
83 int misc_init_r (void)
85 volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
86 volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
87 volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
88 volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
90 ulong len = sizeof(fpgadata);
95 dst = malloc(CFG_FPGA_MAX_SIZE);
96 if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
97 printf ("GUNZIP ERROR - must RESET board to recover\n");
98 do_reset (NULL, 0, 0, NULL);
101 status = fpga_boot(dst, len);
103 printf("\nFPGA: Booting failed ");
105 case ERROR_FPGA_PRG_INIT_LOW:
106 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
108 case ERROR_FPGA_PRG_INIT_HIGH:
109 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
111 case ERROR_FPGA_PRG_DONE:
112 printf("(Timeout: DONE not high after programming FPGA)\n ");
116 /* display infos on fpgaimage */
118 for (i=0; i<4; i++) {
120 printf("FPGA: %s\n", &(dst[index+1]));
125 for (i=20; i>0; i--) {
126 printf("Rebooting in %2d seconds \r",i);
127 for (index=0;index<1000;index++)
131 do_reset(NULL, 0, 0, NULL);
136 /* display infos on fpgaimage */
138 for (i=0; i<4; i++) {
140 printf("%s ", &(dst[index+1]));
148 * Reset FPGA via FPGA_DATA pin
150 SET_FPGA(FPGA_PRG | FPGA_CLK);
151 udelay(1000); /* wait 1ms */
152 SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
153 udelay(1000); /* wait 1ms */
156 * Reset external DUARTs
158 out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
159 udelay(10); /* wait 10us */
160 out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
161 udelay(1000); /* wait 1ms */
164 * Enable interrupts in exar duart mcr[3]
176 * Check Board Identity:
179 int checkboard (void)
182 int i = getenv_r ("serial#", str, sizeof(str));
187 puts ("### No HW ID - assuming WUH405");