3 * Sangmoon Kim, Etin Systems. dogoil@etinsys.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /*TODO: Check processor type */
32 puts ( "Board: Debris "
39 " ##Test not implemented yet##\n");
46 /* TODO: XXX XXX XXX */
47 printf ("## Test not implemented yet ##\n");
53 long int initdram (int board_type)
56 volatile uchar * base= CFG_SDRAM_BASE;
57 volatile ulong * addr;
61 for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
62 addr = (volatile ulong *)base + cnt;
67 addr = (volatile ulong *)base;
76 for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
77 addr = (volatile ulong *)base + cnt;
81 /* ulong new_bank0_end = cnt * sizeof(long) - 1;
82 ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
83 ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
84 mear1 = (mear1 & 0xFFFFFF00) |
85 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
86 emear1 = (emear1 & 0xFFFFFF00) |
87 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
88 mpc824x_mpc107_setreg(MEAR1, mear1);
89 mpc824x_mpc107_setreg(EMEAR1, emear1);*/
91 ret = cnt * sizeof(long);
96 ret = CFG_MAX_RAM_SIZE;
102 * Initialize PCI Devices, report devices found.
104 #ifndef CONFIG_PCI_PNP
105 static struct pci_config_table pci_debris_config_table[] = {
106 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
107 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
109 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
110 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
111 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
113 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
118 struct pci_controller hose = {
119 #ifndef CONFIG_PCI_PNP
120 config_table: pci_debris_config_table,
124 void pci_init_board(void)
126 pci_mpc824x_init(&hose);
129 void *nvram_read(void *dest, const long src, size_t count)
131 volatile uchar *d = (volatile uchar*) dest;
132 volatile uchar *s = (volatile uchar*) src;
135 asm volatile("sync");
140 void nvram_write(long dest, const void *src, size_t count)
142 volatile uchar *d = (volatile uchar*)dest;
143 volatile uchar *s = (volatile uchar*)src;
146 asm volatile("sync");
150 int misc_init_r(void)
152 DECLARE_GLOBAL_DATA_PTR;
154 /* Write ethernet addr in NVRAM for VxWorks */
155 nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
156 (char*)&gd->bd->bi_enetaddr[0], 6);