2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 * Ilko Iliev <www.ronetix.at>
8 * Eric Benard <eric@eukrea.com>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/sizes.h>
31 #include <asm/arch/at91sam9260.h>
32 #include <asm/arch/at91sam9_smc.h>
33 #include <asm/arch/at91_common.h>
34 #include <asm/arch/at91_pmc.h>
35 #include <asm/arch/at91_rstc.h>
36 #include <asm/arch/at91_matrix.h>
37 #include <asm/arch/at91_pio.h>
38 #include <asm/arch/clk.h>
39 #include <asm/arch/io.h>
40 #include <asm/arch/hardware.h>
41 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
46 DECLARE_GLOBAL_DATA_PTR;
48 /* ------------------------------------------------------------------------- */
50 * Miscelaneous platform dependent initialisations
53 #ifdef CONFIG_CMD_NAND
54 static void cpu9260_nand_hw_init(void)
57 at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE;
58 at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
59 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
62 csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
63 writel(csa, &matrix->csa);
65 /* Configure SMC CS3 for NAND/SmartMedia */
66 #if defined(CONFIG_CPU9G20)
67 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
68 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
70 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
71 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
73 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
75 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
76 AT91_SMC_MODE_EXNW_DISABLE |
78 AT91_SMC_MODE_TDF_CYCLE(3),
80 #elif defined(CONFIG_CPU9260)
81 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
82 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
84 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
85 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
87 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
89 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
90 AT91_SMC_MODE_EXNW_DISABLE |
92 AT91_SMC_MODE_TDF_CYCLE(2),
96 writel(1 << AT91SAM9260_ID_PIOC, &pmc->pcer);
98 /* Configure RDY/BSY */
99 at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
101 /* Enable NandFlash */
102 at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
107 static void cpu9260_macb_hw_init(void)
109 unsigned long rstcmr;
110 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
111 at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
114 writel(1 << AT91SAM9260_ID_EMAC, &pmc->pcer);
116 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
118 rstcmr = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
120 /* Need to reset PHY -> 500ms reset */
121 writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0xD) |
122 AT91_RSTC_MR_URSTEN, &rstc->mr);
124 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
126 /* Wait for end hardware reset */
127 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
130 /* Restore NRST value */
131 writel(AT91_RSTC_KEY | rstcmr | AT91_RSTC_MR_URSTEN, &rstc->mr);
137 int board_early_init_f(void)
139 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
141 writel((1 << AT91SAM9260_ID_PIOA) |
142 (1 << AT91SAM9260_ID_PIOC) |
143 (1 << AT91SAM9260_ID_PIOB),
146 at91_serial_hw_init();
154 /* arch number of the board */
155 #if defined(CONFIG_CPU9G20)
156 gd->bd->bi_arch_number = MACH_TYPE_CPUAT9G20;
157 #elif defined(CONFIG_CPU9260)
158 gd->bd->bi_arch_number = MACH_TYPE_CPUAT9260;
161 /* adress of boot parameters */
162 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
164 #ifdef CONFIG_CMD_NAND
165 cpu9260_nand_hw_init();
168 cpu9260_macb_hw_init();
170 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
171 status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
178 gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
179 CONFIG_SYS_SDRAM_SIZE);
183 int board_eth_init(bd_t *bis)
187 rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0);