2 * Copyright 2010 eXMeritus, A Boeing Company
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 #include <asm/mpc85xx_gpio.h>
22 /* Common CPU A/B GPIOs (GPIO8-GPIO15 and IRQ4-IRQ6) */
23 #define GPIO_CPU_ID (1UL << (31 - 8))
24 #define GPIO_BLUE_LED (1UL << (31 - 9))
25 #define GPIO_DIMM_RESET (1UL << (31 - 10))
26 #define GPIO_USB_RESET (1UL << (31 - 11))
27 #define GPIO_UNUSED_12 (1UL << (31 - 12))
28 #define GPIO_GETH0_RESET (1UL << (31 - 13))
29 #define GPIO_RS422_RE (1UL << (31 - 14))
30 #define GPIO_RS422_DE (1UL << (31 - 15))
31 #define IRQ_I2CINT (1UL << (31 - 20))
32 #define IRQ_FANINT (1UL << (31 - 21))
33 #define IRQ_DIMM_EVENT (1UL << (31 - 22))
35 #define GPIO_RESETS (GPIO_DIMM_RESET|GPIO_USB_RESET|GPIO_GETH0_RESET)
37 /* CPU A GPIOS (GPIO0-GPIO7 and IRQ0-IRQ3) */
38 #define GPIO_CPUA_UNUSED_0 (1UL << (31 - 0))
39 #define GPIO_CPUA_CPU_READY (1UL << (31 - 1))
40 #define GPIO_CPUA_DEBUG_LED2 (1UL << (31 - 2))
41 #define GPIO_CPUA_DEBUG_LED1 (1UL << (31 - 3))
42 #define GPIO_CPUA_TDIS2B (1UL << (31 - 4)) /* MAC 2 TX B */
43 #define GPIO_CPUA_TDIS2A (1UL << (31 - 5)) /* MAC 2 TX A */
44 #define GPIO_CPUA_TDIS1B (1UL << (31 - 6)) /* MAC 1 TX B */
45 #define GPIO_CPUA_TDIS1A (1UL << (31 - 7)) /* MAC 1 TX A */
46 #define IRQ_CPUA_UNUSED_0 (1UL << (31 - 16))
47 #define IRQ_CPUA_UNUSED_1 (1UL << (31 - 17))
48 #define IRQ_CPUA_UNUSED_2 (1UL << (31 - 18))
49 #define IRQ_CPUA_UNUSED_3 (1UL << (31 - 19))
51 /* CPU B GPIOS (GPIO0-GPIO7 and IRQ0-IRQ3) */
52 #define GPIO_CPUB_RMUX_SEL1B (1UL << (31 - 0))
53 #define GPIO_CPUB_RMUX_SEL0B (1UL << (31 - 1))
54 #define GPIO_CPUB_RMUX_SEL1A (1UL << (31 - 2))
55 #define GPIO_CPUB_RMUX_SEL0A (1UL << (31 - 3))
56 #define GPIO_CPUB_UNUSED_4 (1UL << (31 - 4))
57 #define GPIO_CPUB_CPU_READY (1UL << (31 - 5))
58 #define GPIO_CPUB_DEBUG_LED2 (1UL << (31 - 6))
59 #define GPIO_CPUB_DEBUG_LED1 (1UL << (31 - 7))
60 #define IRQ_CPUB_SD_1A (1UL << (31 - 16))
61 #define IRQ_CPUB_SD_2B (1UL << (31 - 17))
62 #define IRQ_CPUB_SD_2A (1UL << (31 - 18))
63 #define IRQ_CPUB_SD_1B (1UL << (31 - 19))
65 /* If it isn't CPU A then it's CPU B */
66 static inline unsigned int hww1u1a_is_cpu_a(void)
68 return !mpc85xx_gpio_get(GPIO_CPU_ID);