2 * Copyright 2009-2011 eXMeritus, A Boeing Company
3 * Copyright 2007-2009 Freescale Semiconductor, Inc.
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
13 #include <asm/cache.h>
14 #include <asm/immap_85xx.h>
15 #include <asm/fsl_pci.h>
16 #include <fsl_ddr_sdram.h>
20 #include <linux/ctype.h>
21 #include <fdt_support.h>
24 #include <asm/fsl_law.h>
32 DECLARE_GLOBAL_DATA_PTR;
36 unsigned int gpio_high = 0;
37 unsigned int gpio_low = 0;
38 unsigned int gpio_in = 0;
40 struct ccsr_ddr __iomem *ddr;
42 puts("Board: HWW-1U-1A ");
45 * First just figure out which CPU we're on, then use that to
46 * configure the lists of other GPIOs to be programmed.
48 mpc85xx_gpio_set_in(GPIO_CPU_ID);
49 if (hww1u1a_is_cpu_a()) {
52 /* We want to turn on some LEDs */
53 gpio_high |= GPIO_CPUA_CPU_READY;
54 gpio_low |= GPIO_CPUA_DEBUG_LED1;
55 gpio_low |= GPIO_CPUA_DEBUG_LED2;
57 /* Disable the unused transmitters */
58 gpio_low |= GPIO_CPUA_TDIS1A;
59 gpio_high |= GPIO_CPUA_TDIS1B;
60 gpio_low |= GPIO_CPUA_TDIS2A;
61 gpio_high |= GPIO_CPUA_TDIS2B;
65 /* We want to turn on some LEDs */
66 gpio_high |= GPIO_CPUB_CPU_READY;
67 gpio_low |= GPIO_CPUB_DEBUG_LED1;
68 gpio_low |= GPIO_CPUB_DEBUG_LED2;
70 /* Enable the appropriate receivers */
71 gpio_high |= GPIO_CPUB_RMUX_SEL0A;
72 gpio_high |= GPIO_CPUB_RMUX_SEL0B;
73 gpio_low |= GPIO_CPUB_RMUX_SEL1A;
74 gpio_low |= GPIO_CPUB_RMUX_SEL1B;
77 /* These GPIOs are common */
78 gpio_in |= IRQ_I2CINT | IRQ_FANINT | IRQ_DIMM_EVENT;
79 gpio_low |= GPIO_RS422_RE;
80 gpio_high |= GPIO_RS422_DE;
82 /* Ok, now go ahead and program all of those in one go */
83 mpc85xx_gpio_set(gpio_high|gpio_low|gpio_in,
88 * If things have been taken out of reset early (for example, by one
89 * of the BDI3000 debuggers), then we need to put them back in reset
90 * and delay a while before we continue.
92 if (mpc85xx_gpio_get(GPIO_RESETS)) {
93 ddr = (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
95 puts("Debugger detected... extra device reset enabled!\n");
97 /* Put stuff into reset and disable the DDR controller */
98 mpc85xx_gpio_set_low(GPIO_RESETS);
99 out_be32(&ddr->sdram_cfg, 0x00000000);
101 puts(" Waiting 1 sec for reset...");
102 for (i = 0; i < 10; i++) {
109 /* Now bring everything back out of reset again */
110 mpc85xx_gpio_set_high(GPIO_RESETS);
115 * This little shell function just returns whether or not it's CPU A.
116 * It can be used to select the right device-tree when booting, etc.
118 int do_hww1u1a_test_cpu_a(cmd_tbl_t *cmdtp, int flag,
119 int argc, char * const argv[])
124 if (hww1u1a_is_cpu_a())
130 test_cpu_a, 1, 0, do_hww1u1a_test_cpu_a,
131 "Test if this is CPU A (versus B) on the eXMeritus HWW-1U-1A board",
135 /* Create a prompt-like string: "uboot@HOSTNAME% " */
136 #define PROMPT_PREFIX "uboot@exm"
137 #define PROMPT_SUFFIX "% "
139 /* This function returns a PS1 prompt based on the serial number */
140 static char *hww1u1a_prompt;
141 const char *hww1u1a_get_ps1(void)
143 unsigned long len, i, j;
144 const char *serialnr;
146 /* If our prompt was already set, just use that */
148 return hww1u1a_prompt;
150 /* Use our serial number if present, otherwise a default */
151 serialnr = getenv("serial#");
152 if (!serialnr || !serialnr[0])
153 serialnr = "999999-X";
156 * We will turn the serial number into a hostname by:
157 * (A) Delete all non-alphanumerics.
158 * (B) Lowercase all letters.
160 * (D) Suffix "a" for CPU A and "b" for CPU B.
162 for (i = 0, len = 0; serialnr[i]; i++) {
163 if (isalnum(serialnr[i]))
167 len += sizeof(PROMPT_PREFIX PROMPT_SUFFIX) + 1; /* Includes NUL */
168 hww1u1a_prompt = malloc(len);
170 return PROMPT_PREFIX "UNKNOWN(ENOMEM)" PROMPT_SUFFIX;
172 /* Now actually fill it in */
175 /* Handle the prefix */
176 for (j = 0; j < sizeof(PROMPT_PREFIX) - 1; j++)
177 hww1u1a_prompt[i++] = PROMPT_PREFIX[j];
179 /* Now the serial# part of the hostname */
180 for (j = 0; serialnr[j]; j++)
181 if (isalnum(serialnr[j]))
182 hww1u1a_prompt[i++] = tolower(serialnr[j]);
184 /* Now the CPU id ("a" or "b") */
185 hww1u1a_prompt[i++] = hww1u1a_is_cpu_a() ? 'a' : 'b';
187 /* Finally the suffix */
188 for (j = 0; j < sizeof(PROMPT_SUFFIX); j++)
189 hww1u1a_prompt[i++] = PROMPT_SUFFIX[j];
191 /* This should all have added up, but just in case */
192 hww1u1a_prompt[len - 1] = '\0';
195 return hww1u1a_prompt;
198 void pci_init_board(void)
200 fsl_pcie_init_board(0);
203 int board_early_init_r(void)
205 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
206 int flash_esel = find_tlb_idx((void *)flashbase, 1);
209 * Remap bootflash region to caching-inhibited
210 * so that flash can be erased properly.
213 /* Flush d-cache and invalidate i-cache of any FLASH data */
217 if (flash_esel == -1) {
218 /* very unlikely unless something is messed up */
219 puts("Error: Could not find TLB for FLASH BASE\n");
220 flash_esel = 2; /* give our best effort to continue */
222 /* invalidate existing TLB entry for FLASH */
223 disable_tlb(flash_esel);
226 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
227 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
228 0, flash_esel, BOOKE_PAGESZ_256M, 1);
233 int board_eth_init(bd_t *bis)
235 struct tsec_info_struct tsec_info[4];
236 struct fsl_pq_mdio_info mdio_info;
238 SET_STD_TSEC_INFO(tsec_info[0], 1);
239 SET_STD_TSEC_INFO(tsec_info[1], 2);
240 SET_STD_TSEC_INFO(tsec_info[2], 3);
242 if (hww1u1a_is_cpu_a())
243 tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUA;
245 tsec_info[2].phyaddr = TSEC3_PHY_ADDR_CPUB;
247 mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
248 mdio_info.name = DEFAULT_MII_NAME;
249 fsl_pq_mdio_init(bis, &mdio_info);
251 tsec_eth_init(bis, tsec_info, 3);
252 return pci_eth_init(bis);
255 void ft_board_setup(void *blob, bd_t *bd)
260 ft_cpu_setup(blob, bd);
262 base = getenv_bootm_low();
263 size = getenv_bootm_size();
265 fdt_fixup_memory(blob, (u64)base, (u64)size);