2 * Copyright 2007, 2010 Freescale Semiconductor, Inc.
3 * York Sun <yorksun@freescale.com>
5 * FSL DIU Framebuffer driver
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include "fsl_diu_fb.h"
34 const char *name; /* optional */
35 unsigned int refresh; /* optional */
38 unsigned int pixclock;
39 unsigned int left_margin;
40 unsigned int right_margin;
41 unsigned int upper_margin;
42 unsigned int lower_margin;
43 unsigned int hsync_len;
44 unsigned int vsync_len;
50 #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
51 #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
52 #define FB_VMODE_NONINTERLACED 0 /* non interlaced */
54 /* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
55 static struct fb_videomode fsl_diu_mode_800 = {
67 .vmode = FB_VMODE_NONINTERLACED
71 * These parameters give default parameters
72 * for video output 1024x768,
73 * FIXME - change timing to proper amounts
74 * hsync 31.5kHz, vsync 60Hz
76 static struct fb_videomode fsl_diu_mode_1024 = {
87 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
88 .vmode = FB_VMODE_NONINTERLACED
91 static struct fb_videomode fsl_diu_mode_1280 = {
92 .name = "1280x1024-60",
103 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
104 .vmode = FB_VMODE_NONINTERLACED
108 * These are the fields of area descriptor(in DDR memory) for every plane
111 /* Word 0(32-bit) in DDR memory */
112 unsigned int pix_fmt; /* hard coding pixel format */
113 /* Word 1(32-bit) in DDR memory */
115 /* Word 2(32-bit) in DDR memory */
116 unsigned int src_size_g_alpha;
117 /* Word 3(32-bit) in DDR memory */
118 unsigned int aoi_size;
119 /* Word 4(32-bit) in DDR memory */
120 unsigned int offset_xyi;
121 /* Word 5(32-bit) in DDR memory */
122 unsigned int offset_xyd;
123 /* Word 6(32-bit) in DDR memory */
124 unsigned int ckmax_r:8;
125 unsigned int ckmax_g:8;
126 unsigned int ckmax_b:8;
128 /* Word 7(32-bit) in DDR memory */
129 unsigned int ckmin_r:8;
130 unsigned int ckmin_g:8;
131 unsigned int ckmin_b:8;
132 unsigned int res10:8;
133 /* Word 8(32-bit) in DDR memory */
134 unsigned int next_ad;
135 /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
139 }__attribute__ ((packed));
145 unsigned int desc[3];
147 unsigned int pallete;
149 unsigned int curs_pos;
150 unsigned int diu_mode;
152 unsigned int bgnd_wb;
153 unsigned int disp_size;
154 unsigned int wb_size;
155 unsigned int wb_mem_addr;
156 unsigned int hsyn_para;
157 unsigned int vsyn_para;
158 unsigned int syn_pol;
159 unsigned int thresholds;
160 unsigned int int_status;
161 unsigned int int_mask;
162 unsigned int colorbar[8];
163 unsigned int filling;
165 } __attribute__ ((packed));
169 volatile unsigned int mode; /* DIU operation mode */
173 unsigned char * paddr; /* Virtual address */
178 * Modes of operation of DIU
180 #define MFB_MODE0 0 /* DIU off */
181 #define MFB_MODE1 1 /* All three planes output to display */
182 #define MFB_MODE2 2 /* Plane 1 to display,
183 * planes 2+3 written back to memory */
184 #define MFB_MODE3 3 /* All three planes written back to memory */
185 #define MFB_MODE4 4 /* Color bar generation */
189 static struct fb_info fsl_fb_info;
190 static struct diu_addr gamma, cursor;
191 static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
192 static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
193 static unsigned char *dummy_fb;
194 static struct diu_hw dr = {
199 int fb_initialized = 0;
200 const int default_xres = 1280;
201 const int default_pixel_format = 0x88882317;
203 static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
204 static void enable_lcdc(void);
205 static void disable_lcdc(void);
206 static int fsl_diu_enable_panel(struct fb_info *info);
207 static int fsl_diu_disable_panel(struct fb_info *info);
208 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
209 void diu_set_pixel_clock(unsigned int pixclock);
211 int fsl_diu_init(int xres,
212 unsigned int pixel_format,
214 unsigned char *splash_bmp)
216 struct fb_videomode *fsl_diu_mode_db;
217 struct diu_ad *ad = &fsl_diu_fb_ad;
219 struct fb_info *info = &fsl_fb_info;
220 struct fb_var_screeninfo *var = &info->var;
221 unsigned char *gamma_table_base;
224 debug("Enter fsl_diu_init\n");
225 dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR);
226 hw = (struct diu *) dr.diu_reg;
232 fsl_diu_mode_db = &fsl_diu_mode_800;
235 fsl_diu_mode_db = &fsl_diu_mode_1280;
238 fsl_diu_mode_db = &fsl_diu_mode_1024;
241 if (0 == fb_initialized) {
242 allocate_buf(&gamma, 768, 32);
243 debug("gamma is allocated @ 0x%x\n",
244 (unsigned int)gamma.paddr);
245 allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
246 debug("curosr is allocated @ 0x%x\n",
247 (unsigned int)cursor.paddr);
249 /* create a dummy fb and dummy ad */
250 dummy_fb = malloc(64);
251 if (NULL == dummy_fb) {
252 printf("Cannot allocate dummy fb\n");
255 dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
256 dummy_ad.pix_fmt = 0x88882317;
257 dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
258 dummy_ad.aoi_size = 0x02000400;
259 dummy_ad.offset_xyi = 0;
260 dummy_ad.offset_xyd = 0;
261 dummy_ad.next_ad = 0;
262 /* Memory allocation for framebuffer */
263 if (map_video_memory(info, 32)) {
264 printf("Unable to allocate fb memory 1\n");
269 memset(info->screen_base, 0, info->smem_len);
271 out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad);
272 out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad);
273 out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad);
274 debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
275 debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
278 var->xres = fsl_diu_mode_db->xres;
279 var->yres = fsl_diu_mode_db->yres;
280 var->bits_per_pixel = 32;
281 var->pixclock = fsl_diu_mode_db->pixclock;
282 var->left_margin = fsl_diu_mode_db->left_margin;
283 var->right_margin = fsl_diu_mode_db->right_margin;
284 var->upper_margin = fsl_diu_mode_db->upper_margin;
285 var->lower_margin = fsl_diu_mode_db->lower_margin;
286 var->hsync_len = fsl_diu_mode_db->hsync_len;
287 var->vsync_len = fsl_diu_mode_db->vsync_len;
288 var->sync = fsl_diu_mode_db->sync;
289 var->vmode = fsl_diu_mode_db->vmode;
290 info->line_length = var->xres * var->bits_per_pixel / 8;
292 info->logo_height = 0;
294 ad->pix_fmt = pixel_format;
295 ad->addr = cpu_to_le32((unsigned int)info->screen_base);
297 = cpu_to_le32((var->yres << 12) | var->xres);
298 /* fix me. AOI should not be greater than display size */
299 ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
303 /* Disable chroma keying function */
312 gamma_table_base = gamma.paddr;
313 debug("gamma_table_base is allocated @ 0x%x\n",
314 (unsigned int)gamma_table_base);
316 /* Prep for DIU init - gamma table */
318 for (i = 0; i <= 2; i++)
319 for (j = 0; j <= 255; j++)
320 *gamma_table_base++ = j;
322 if (gamma_fix == 1) { /* fix the gamma */
323 debug("Fix gamma table\n");
324 gamma_table_base = gamma.paddr;
325 for (i = 0; i < 256*3; i++) {
326 gamma_table_base[i] = (gamma_table_base[i] << 2)
327 | ((gamma_table_base[i] >> 6) & 0x03);
331 debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
333 /* Program DIU registers */
335 out_be32(&hw->gamma, (int)gamma.paddr);
336 out_be32(&hw->cursor, (int)cursor.paddr);
337 out_be32(&hw->bgnd, 0x007F7F7F);
338 out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
339 out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */
340 out_be32(&hw->wb_size, 0); /* WB SIZE */
341 out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
342 out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */
343 var->hsync_len << 11 | /* PW_H */
344 var->right_margin); /* FP_H */
346 out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */
347 var->vsync_len << 11 | /* PW_V */
348 var->lower_margin); /* FP_V */
350 out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
351 out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
352 out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
353 out_be32(&hw->int_mask, 0); /* INT MASK */
354 out_be32(&hw->plut, 0x01F5F666);
355 /* Pixel Clock configuration */
356 debug("DIU pixclock in ps - %d\n", var->pixclock);
357 diu_set_pixel_clock(var->pixclock);
362 info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
363 info->logo_size = info->logo_height * info->line_length;
364 debug("logo height %d, logo_size 0x%x\n",
365 info->logo_height,info->logo_size);
369 fsl_diu_enable_panel(info);
375 char *fsl_fb_open(struct fb_info **info)
377 *info = &fsl_fb_info;
378 return (char *) ((unsigned int)(*info)->screen_base
379 + (*info)->logo_size);
382 void fsl_diu_close(void)
384 struct fb_info *info = &fsl_fb_info;
385 fsl_diu_disable_panel(info);
388 static int fsl_diu_enable_panel(struct fb_info *info)
390 struct diu *hw = dr.diu_reg;
391 struct diu_ad *ad = &fsl_diu_fb_ad;
393 debug("Entered: enable_panel\n");
394 if (in_be32(&hw->desc[0]) != (unsigned)ad)
395 out_be32(&hw->desc[0], (unsigned)ad);
396 debug("desc[0] = 0x%x\n", hw->desc[0]);
400 static int fsl_diu_disable_panel(struct fb_info *info)
402 struct diu *hw = dr.diu_reg;
404 debug("Entered: disable_panel\n");
405 if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad)
406 out_be32(&hw->desc[0], (unsigned)&dummy_ad);
410 static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
412 unsigned long offset;
415 debug("Entered: map_video_memory\n");
416 /* allocate maximum 1280*1024 with 32bpp */
417 info->smem_len = 1280 * 4 *1024 + bytes_align;
418 debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
419 info->screen_base = malloc(info->smem_len);
420 if (info->screen_base == NULL) {
421 printf("Unable to allocate fb memory\n");
424 info->smem_start = (unsigned int) info->screen_base;
425 mask = bytes_align - 1;
426 offset = (unsigned long)info->screen_base & mask;
428 info->screen_base += (bytes_align - offset);
429 info->smem_len = info->smem_len - (bytes_align - offset);
431 info->smem_len = info->smem_len - bytes_align;
433 info->screen_size = info->smem_len;
435 debug("Allocated fb @ 0x%08lx, size=%d.\n",
436 info->smem_start, info->smem_len);
441 static void enable_lcdc(void)
443 struct diu *hw = dr.diu_reg;
445 debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
447 out_be32(&hw->diu_mode, dr.mode);
450 debug("diu_mode = %d\n", hw->diu_mode);
453 static void disable_lcdc(void)
455 struct diu *hw = dr.diu_reg;
457 debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
459 out_be32(&hw->diu_mode, 0);
465 * Align to 64-bit(8-byte), 32-byte, etc.
467 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
472 debug("Entered: allocate_buf\n");
473 ssize = size + bytes_align;
474 buf->paddr = malloc(ssize);
478 memset(buf->paddr, 0, ssize);
479 mask = bytes_align - 1;
480 offset = (u32)buf->paddr & mask;
482 buf->offset = bytes_align - offset;
483 buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
489 int fsl_diu_display_bmp(unsigned char *bmp,
494 struct fb_info *info = &fsl_fb_info;
495 unsigned char r, g, b;
496 unsigned int *fb_t, val;
497 unsigned char *bitmap;
498 unsigned int palette[256];
499 int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
502 printf("Must supply a bitmap address\n");
506 raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24);
507 width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18];
508 height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22];
509 bpp = (bmp[29] << 8) | (bmp[28]);
510 ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24);
511 bitmap = bmp + raster;
512 cpp = info->var.bits_per_pixel / 8;
514 debug("bmp = 0x%08x\n", (unsigned int)bmp);
515 debug("bitmap = 0x%08x\n", (unsigned int)bitmap);
516 debug("width = %d\n", width);
517 debug("height = %d\n", height);
518 debug("bpp = %d\n", bpp);
519 debug("ncolors = %d\n", ncolors);
521 debug("xres = %d\n", info->var.xres);
522 debug("yres = %d\n", info->var.yres);
523 debug("Screen_base = 0x%x\n", (unsigned int)info->screen_base);
525 if (((width+xoffset) > info->var.xres) ||
526 ((height+yoffset) > info->var.yres)) {
527 printf("bitmap is out of range, image too large or too much offset\n");
531 for (i = 0, offset = 54; i < ncolors; i++, offset += 4)
532 palette[i] = (bmp[offset+2] << 16)
533 + (bmp[offset+1] << 8) + bmp[offset];
538 for (y = height - 1; y >= 0; y--) {
539 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
540 for (x = 0; x < width; x += 8) {
542 for (k = 0; k < 8; k++) {
544 *fb_t++ = palette[1];
546 *fb_t++ = palette[0];
550 for (i = (width / 2) % 4; i > 0; i--)
555 for (y = height - 1; y >= 0; y--) {
556 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
557 for (x = 0; x < width; x += 2) {
561 *fb_t++ = palette[r];
562 *fb_t++ = palette[g];
564 for (i = (width / 2) % 4; i > 0; i--)
569 for (y = height - 1; y >= 0; y--) {
570 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
571 for (x = 0; x < width; x++) {
572 *fb_t++ = palette[ *bitmap++ ];
574 for (i = (width / 2) % 4; i > 0; i--)
579 for (y = height - 1; y >= 0; y--) {
580 fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp);
581 for (x = 0; x < width; x++) {
585 val = (r << 16) + (g << 8) + b;
588 for (; (x % 4) != 0; x++) /* 4-byte alignment */
597 void fsl_diu_clear_screen(void)
599 struct fb_info *info = &fsl_fb_info;
601 memset(info->screen_base, 0, info->smem_len);