2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <power/pmic.h>
10 #include <power/pfuze100_pmic.h>
12 #ifndef CONFIG_DM_PMIC_PFUZE100
13 int pfuze_mode_init(struct pmic *p, u32 mode)
15 unsigned char offset, i, switch_num;
18 pmic_reg_read(p, PFUZE100_DEVICEID, &id);
23 offset = PFUZE100_SW1CMODE;
26 offset = PFUZE100_SW2MODE;
28 printf("Not supported, id=%d\n", id);
32 ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
34 printf("Set SW1AB mode error!\n");
38 for (i = 0; i < switch_num - 1; i++) {
39 ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
41 printf("Set switch 0x%x mode error!\n",
42 offset + i * SWITCH_SIZE);
50 struct pmic *pfuze_common_init(unsigned char i2cbus)
56 ret = power_pfuze100_init(i2cbus);
60 p = pmic_get("PFUZE100");
65 pmic_reg_read(p, PFUZE100_DEVICEID, ®);
66 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
68 /* Set SW1AB stanby volage to 0.975V */
69 pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
70 reg &= ~SW1x_STBY_MASK;
72 pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
74 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
75 pmic_reg_read(p, PFUZE100_SW1ABCONF, ®);
76 reg &= ~SW1xCONF_DVSSPEED_MASK;
77 reg |= SW1xCONF_DVSSPEED_4US;
78 pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
80 /* Set SW1C standby voltage to 0.975V */
81 pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
82 reg &= ~SW1x_STBY_MASK;
84 pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
86 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
87 pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
88 reg &= ~SW1xCONF_DVSSPEED_MASK;
89 reg |= SW1xCONF_DVSSPEED_4US;
90 pmic_reg_write(p, PFUZE100_SW1CCONF, reg);