2 * Copyright 2016 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __LS1043AQDS_QIXIS_H__
8 #define __LS1043AQDS_QIXIS_H__
10 /* Definitions of QIXIS Registers for LS1043AQDS */
12 /* BRDCFG4[4:7] select EC1 and EC2 as a pair */
13 #define BRDCFG4_EMISEL_MASK 0xe0
14 #define BRDCFG4_EMISEL_SHIFT 5
17 #define QIXIS_SYSCLK_66 0x0
18 #define QIXIS_SYSCLK_83 0x1
19 #define QIXIS_SYSCLK_100 0x2
20 #define QIXIS_SYSCLK_125 0x3
21 #define QIXIS_SYSCLK_133 0x4
24 #define QIXIS_DDRCLK_66 0x0
25 #define QIXIS_DDRCLK_100 0x1
26 #define QIXIS_DDRCLK_125 0x2
27 #define QIXIS_DDRCLK_133 0x3
29 /* BRDCFG2 - SD clock*/
30 #define QIXIS_SDCLK1_100 0x0
31 #define QIXIS_SDCLK1_125 0x1
32 #define QIXIS_SDCLK1_165 0x2
33 #define QIXIS_SDCLK1_100_SP 0x3