3 QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
4 development platform, with a complete debugging environment.
5 The LS1012ARDB board supports the QorIQ LS1012A processor and is
6 optimized to support the high-bandwidth DDR3L memory and
7 a full complement of high-speed SerDes ports.
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
14 LS1012ARDB board Overview
15 -----------------------
16 - SERDES Connections, 4 lanes supporting:
21 - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
22 -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
24 - QSPI NOR flash memory (2 virtual banks)
27 - one high-speed USB 2.0/3.0 port.
28 - Two enhanced secure digital host controllers:
29 - SDHC1 controller can be connected to onboard SDHC connector
30 - SDHC2 controller: Three dual 1:4 mux/demux devices,
31 74CBTLV3253DS (U30, U31, U33) drive the SDHC2 signals to eMMC,
32 SDIO WiFi, SPI, and Ardiuno shield
34 - One SATA onboard connectors
36 - The LS1012A processor consists of two UART controllers,
37 out of which only UART1 is used on RDB.
42 a) QSPI Flash Emu Boot
48 Images | Size |QSPI Flash Address
49 ------------------------------------------
50 RCW + PBI | 1MB | 0x4000_0000
51 U-boot | 1MB | 0x4010_0000
52 U-boot Env | 1MB | 0x4020_0000
53 PPA FIT image | 2MB | 0x4050_0000
54 Linux ITB | ~53MB | 0x40A0_0000