2 * Copyright 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <fdt_support.h>
15 #include <fsl_debug_server.h>
16 #include <fsl-mc/fsl_mc.h>
17 #include <environment.h>
18 #include <asm/arch/soc.h>
20 DECLARE_GLOBAL_DATA_PTR;
24 init_final_memctl_regs();
26 #ifdef CONFIG_ENV_IS_NOWHERE
27 gd->env_addr = (ulong)&default_environment[0];
33 int board_early_init_f(void)
35 fsl_lsch3_early_init_f();
39 void detail_board_ddr_info(void)
42 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
44 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
45 if (gd->bd->bi_dram[2].size) {
47 print_size(gd->bd->bi_dram[2].size, "");
48 print_ddr_info(CONFIG_DP_DDR_CTRL);
55 gd->ram_size = initdram(0);
60 #if defined(CONFIG_ARCH_MISC_INIT)
61 int arch_misc_init(void)
63 #ifdef CONFIG_FSL_DEBUG_SERVER
71 unsigned long get_dram_size_to_hide(void)
73 unsigned long dram_to_hide = 0;
75 /* Carve the Debug Server private DRAM block from the end of DRAM */
76 #ifdef CONFIG_FSL_DEBUG_SERVER
77 dram_to_hide += debug_server_get_dram_block_size();
80 /* Carve the MC private DRAM block from the end of DRAM */
81 #ifdef CONFIG_FSL_MC_ENET
82 dram_to_hide += mc_get_dram_block_size();
85 return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
88 int board_eth_init(bd_t *bis)
92 #ifdef CONFIG_SMC91111
93 error = smc91111_initialize(0, CONFIG_SMC91111_BASE);
96 #ifdef CONFIG_FSL_MC_ENET
97 error = cpu_eth_init(bis);
102 #ifdef CONFIG_FSL_MC_ENET
103 void fdt_fixup_board_enet(void *fdt)
107 offset = fdt_path_offset(fdt, "/fsl-mc");
110 * TODO: Remove this when backward compatibility
111 * with old DT node (fsl,dprc@0) is no longer needed.
114 offset = fdt_path_offset(fdt, "/fsl,dprc@0");
117 printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
122 if (get_mc_boot_status() == 0)
123 fdt_status_okay(fdt, offset);
125 fdt_status_fail(fdt, offset);
129 #ifdef CONFIG_OF_BOARD_SETUP
130 int ft_board_setup(void *blob, bd_t *bd)
132 u64 base[CONFIG_NR_DRAM_BANKS];
133 u64 size[CONFIG_NR_DRAM_BANKS];
135 ft_cpu_setup(blob, bd);
137 /* fixup DT for the two GPP DDR banks */
138 base[0] = gd->bd->bi_dram[0].start;
139 size[0] = gd->bd->bi_dram[0].size;
140 base[1] = gd->bd->bi_dram[1].start;
141 size[1] = gd->bd->bi_dram[1].size;
143 fdt_fixup_memory_banks(blob, base, size, 2);
145 #ifdef CONFIG_FSL_MC_ENET
146 fdt_fixup_board_enet(blob);
147 fsl_mc_ldpaa_exit(bd);