2 * Copyright 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <fdt_support.h>
16 #include <environment.h>
18 DECLARE_GLOBAL_DATA_PTR;
22 init_final_memctl_regs();
24 #ifdef CONFIG_ENV_IS_NOWHERE
25 gd->env_addr = (ulong)&default_environment[0];
31 int board_early_init_f(void)
33 init_early_memctl_regs(); /* tighten IFC timing */
38 void detail_board_ddr_info(void)
41 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
43 if (gd->bd->bi_dram[2].size) {
45 print_size(gd->bd->bi_dram[2].size, "");
46 print_ddr_info(CONFIG_DP_DDR_CTRL);
52 gd->ram_size = initdram(0);
59 u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
60 u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
62 out_le32(cltbenr, 0x1); /* enable cluster0 timebase */
63 out_le32(cntcr, 0x1); /* enable clock for timer */
69 * Board specific reset that is system reset.
71 void reset_cpu(ulong addr)
75 int board_eth_init(bd_t *bis)
79 #ifdef CONFIG_SMC91111
80 error = smc91111_initialize(0, CONFIG_SMC91111_BASE);
83 #ifdef CONFIG_FSL_MC_ENET
84 error = cpu_eth_init(bis);
89 #ifdef CONFIG_FSL_MC_ENET
90 void fdt_fixup_board_enet(void *fdt)
94 offset = fdt_path_offset(fdt, "/fsl,dprc@0");
95 if (get_mc_boot_status() == 0)
96 fdt_status_okay(fdt, offset);
98 fdt_status_fail(fdt, offset);
102 #ifdef CONFIG_OF_BOARD_SETUP
103 int ft_board_setup(void *blob, bd_t *bd)
108 ft_cpu_setup(blob, bd);
110 /* limit the memory size to bank 1 until Linux can handle 40-bit PA */
111 base = getenv_bootm_low();
112 size = getenv_bootm_size();
113 fdt_fixup_memory(blob, (u64)base, (u64)size);
115 #ifdef CONFIG_FSL_MC_ENET
116 fdt_fixup_board_enet(blob);