3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/immap.h>
13 int checkboard (void) {
18 puts("Freescale M5249EVB");
19 val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
20 printf(" (Switch=%1X)\n", val8);
25 val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED;
26 mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
32 phys_size_t initdram (int board_type) {
33 unsigned long junk = 0xa5a59696;
37 * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
40 #ifdef CONFIG_SYS_FAST_CLK
42 * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
43 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
45 mbar_writeShort(MCFSIM_DCR, 0x8239);
46 #elif CONFIG_SYS_PLL_BYPASS
48 * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
49 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
51 mbar_writeShort(MCFSIM_DCR, 0x8202);
54 * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
55 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
57 mbar_writeShort(MCFSIM_DCR, 0x8222);
61 * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
62 * PM=1 (continuous page mode)
65 /* RE=0 (keep auto-refresh disabled while setting up registers) */
66 mbar_writeLong(MCFSIM_DACR0, 0x00003324);
68 /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
69 mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
71 /** Precharge sequence **/
72 mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
73 *((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */
74 udelay(0x10); /* Allow several Precharge cycles */
76 /** Refresh Sequence **/
77 mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
78 udelay(0x7d0); /* Allow gobs of refresh cycles */
80 /** Mode Register initialization **/
81 mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
82 *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
84 return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
89 /* TODO: XXX XXX XXX */
90 printf ("DRAM test not implemented!\n");