git.sur5r.net Git - u-boot/blob - board/freescale/m547xevb/m547xevb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2000-2003
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  *
   6  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
   7  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <pci.h>
  13 #include <asm/immap.h>
  14 #include <asm/io.h>
  15
  16 DECLARE_GLOBAL_DATA_PTR;
  17
  18 int checkboard(void)
  19 {
  20         puts("Board: ");
  21         puts("Freescale FireEngine 5475 EVB\n");
  22         return 0;
  23 };
  24
  25 int dram_init(void)
  26 {
  27         siu_t *siu = (siu_t *) (MMAP_SIU);
  28         sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
  29         u32 dramsize, i;
  30 #ifdef CONFIG_SYS_DRAMSZ1
  31         u32 temp;
  32 #endif
  33
  34         out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
  35
  36         dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
  37         for (i = 0x13; i < 0x20; i++) {
  38                 if (dramsize == (1 << i))
  39                         break;
  40         }
  41         i--;
  42         out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
  43
  44 #ifdef CONFIG_SYS_DRAMSZ1
  45         temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
  46         for (i = 0x13; i < 0x20; i++) {
  47                 if (temp == (1 << i))
  48                         break;
  49         }
  50         i--;
  51         dramsize += temp;
  52         out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
  53 #endif
  54
  55         out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
  56         out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
  57
  58         /* Issue PALL */
  59         out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
  60
  61         /* Issue LEMR */
  62         out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
  63         out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
  64
  65         udelay(500);
  66
  67         /* Issue PALL */
  68         out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
  69
  70         /* Perform two refresh cycles */
  71         out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
  72         out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
  73
  74         out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
  75
  76         out_be32(&sdram->ctrl,
  77                 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
  78
  79         udelay(100);
  80
  81         gd->ram_size = dramsize;
  82
  83         return 0;
  84 };
  85
  86 int testdram(void)
  87 {
  88         /* TODO: XXX XXX XXX */
  89         printf("DRAM test not implemented!\n");
  90
  91         return (0);
  92 }
  93
  94 #if defined(CONFIG_PCI)
  95 /*
  96  * Initialize PCI devices, report devices found.
  97  */
  98 static struct pci_controller hose;
  99 extern void pci_mcf547x_8x_init(struct pci_controller *hose);
 100
 101 void pci_init_board(void)
 102 {
 103         pci_mcf547x_8x_init(&hose);
 104 }
 105 #endif                          /* CONFIG_PCI */