1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
13 #include <asm/immap.h>
16 DECLARE_GLOBAL_DATA_PTR;
21 puts("Freescale FireEngine 5485 EVB\n");
27 siu_t *siu = (siu_t *) (MMAP_SIU);
28 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
30 #ifdef CONFIG_SYS_DRAMSZ1
34 out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
36 dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
37 for (i = 0x13; i < 0x20; i++) {
38 if (dramsize == (1 << i))
42 out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
44 #ifdef CONFIG_SYS_DRAMSZ1
45 temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
46 for (i = 0x13; i < 0x20; i++) {
52 out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
56 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
59 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
62 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
63 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
68 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
70 /* Perform two refresh cycles */
71 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
72 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
74 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
76 out_be32(&sdram->ctrl,
77 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
81 gd->ram_size = dramsize;
88 /* TODO: XXX XXX XXX */
89 printf("DRAM test not implemented!\n");
94 #if defined(CONFIG_PCI)
96 * Initialize PCI devices, report devices found.
98 static struct pci_controller hose;
99 extern void pci_mcf547x_8x_init(struct pci_controller *hose);
101 void pci_init_board(void)
103 pci_mcf547x_8x_init(&hose);
105 #endif /* CONFIG_PCI */