2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
3 * Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <fdt_support.h>
34 #include <fsl_esdhc.h>
36 #include <asm/fsl_serdes.h>
37 #include <asm/fsl_mpc83xx_serdes.h>
39 DECLARE_GLOBAL_DATA_PTR;
42 * The following are used to control the SPI chip selects for the SPI command.
44 #ifdef CONFIG_MPC8XXX_SPI
46 #define SPI_CS_MASK 0x00400000
48 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
50 return bus == 0 && cs == 0;
53 void spi_cs_activate(struct spi_slave *slave)
55 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
58 clrbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
61 void spi_cs_deactivate(struct spi_slave *slave)
63 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
66 setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
68 #endif /* CONFIG_MPC8XXX_SPI */
70 #ifdef CONFIG_FSL_ESDHC
71 int board_mmc_init(bd_t *bd)
73 return fsl_esdhc_mmc_init(bd);
77 static u8 read_board_info(void)
82 if (i2c_read(CONFIG_SYS_I2C_PCF8574A_ADDR, 0, 0, &val8, 1) == 0)
90 static const char * const rev_str[] = {
100 info = read_board_info();
101 i = (!info) ? 4 : info & 0x03;
103 printf("Board: Freescale MPC8308RDB Rev %s\n", rev_str[i]);
108 static struct pci_region pcie_regions_0[] = {
110 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
111 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
112 .size = CONFIG_SYS_PCIE1_MEM_SIZE,
113 .flags = PCI_REGION_MEM,
116 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
117 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
118 .size = CONFIG_SYS_PCIE1_IO_SIZE,
119 .flags = PCI_REGION_IO,
123 void pci_init_board(void)
125 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
126 sysconf83xx_t *sysconf = &immr->sysconf;
127 law83xx_t *pcie_law = sysconf->pcielaw;
128 struct pci_region *pcie_reg[] = { pcie_regions_0 };
130 fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
131 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
133 /* Deassert the resets in the control register */
134 out_be32(&sysconf->pecr1, 0xE0008000);
137 /* Configure PCI Express Local Access Windows */
138 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
139 out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
141 mpc83xx_pcie_init(1, pcie_reg);
144 * Miscellaneous late-boot configurations
146 * If a VSC7385 microcode image is present, then upload it.
148 int misc_init_r(void)
150 #ifdef CONFIG_MPC8XXX_SPI
151 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
152 sysconf83xx_t *sysconf = &immr->sysconf;
155 * Set proper bits in SICRH to allow SPI on header J8
157 * NOTE: this breaks the TSEC2 interface, attached to the Vitesse
158 * switch. The pinmux configuration does not have a fine enough
159 * granularity to support both simultaneously.
161 clrsetbits_be32(&sysconf->sicrh, SICRH_GPIO_A_TSEC2, SICRH_GPIO_A_GPIO);
162 puts("WARNING: SPI enabled, TSEC2 support is broken\n");
164 /* Set header J8 SPI chip select output, disabled */
165 setbits_be32(&immr->gpio[0].dir, SPI_CS_MASK);
166 setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK);
169 #ifdef CONFIG_VSC7385_IMAGE
170 if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
171 CONFIG_VSC7385_IMAGE_SIZE)) {
172 puts("Failure uploading VSC7385 microcode.\n");
179 #if defined(CONFIG_OF_BOARD_SETUP)
180 void ft_board_setup(void *blob, bd_t *bd)
182 ft_cpu_setup(blob, bd);
183 fdt_fixup_dr_usb(blob, bd);
184 fdt_fixup_esdhc(blob, bd);
188 int board_eth_init(bd_t *bis)
192 /* Initialize TSECs first */
193 rv = cpu_eth_init(bis);
197 printf("ERROR: failed to initialize TSECs.\n");
199 rv = pci_eth_init(bis);
203 printf("ERROR: failed to initialize PCI Ethernet.\n");