2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/fsl_ddr_sdram.h>
26 #include <asm/fsl_ddr_dimm_params.h>
28 struct board_specific_parameters {
30 u32 datarate_mhz_high;
38 * This table contains all valid speeds we want to override with board
39 * specific parameters. datarate_mhz_high values need to be in ascending order
40 * for each n_ranks group.
42 static const struct board_specific_parameters udimm0[] = {
45 * num| hi| clk| cpo|wrdata|2T
46 * ranks| mhz|adjst| | delay|
51 {2, 850, 4, 31, 2, 0},
55 {1, 850, 4, 31, 2, 0},
59 void fsl_ddr_board_options(memctl_options_t *popts,
61 unsigned int ctrl_num)
63 const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
67 if (ctrl_num != 0) /* we have only one controller */
69 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
73 if (i >= CONFIG_DIMM_SLOTS_PER_CTLR) /* no DIMM */
78 /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr
79 * freqency and n_banks specified in board_specific_parameters table.
81 ddr_freq = get_ddr_freq(0) / 1000000;
82 while (pbsp->datarate_mhz_high) {
83 if (pbsp->n_ranks == pdimm[i].n_ranks) {
84 if (ddr_freq <= pbsp->datarate_mhz_high) {
85 popts->clk_adjust = pbsp->clk_adjust;
86 popts->cpo_override = pbsp->cpo;
87 popts->write_data_delay =
88 pbsp->write_data_delay;
89 popts->twoT_en = pbsp->force_2T;
98 printf("Error: board specific timing not found "
99 "for data rate %lu MT/s!\n"
100 "Trying to use the highest speed (%u) parameters\n",
101 ddr_freq, pbsp_highest->datarate_mhz_high);
102 popts->clk_adjust = pbsp_highest->clk_adjust;
103 popts->cpo_override = pbsp_highest->cpo;
104 popts->write_data_delay = pbsp_highest->write_data_delay;
105 popts->twoT_en = pbsp_highest->force_2T;
107 panic("DIMM is not supported by this board");
112 * Factors to consider for half-strength driver enable:
113 * - number of DIMMs installed
115 popts->half_strength_driver_enable = 0;
116 popts->DQS_config = 0; /* only true DQS signal is used on board */