2 * See file CREDITS for list of people who contributed to this
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/fsl_i2c.h>
30 DECLARE_GLOBAL_DATA_PTR;
34 static struct pci_region pci1_regions[] = {
36 bus_start: CFG_PCI1_MEM_BASE,
37 phys_start: CFG_PCI1_MEM_PHYS,
38 size: CFG_PCI1_MEM_SIZE,
39 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
42 bus_start: CFG_PCI1_IO_BASE,
43 phys_start: CFG_PCI1_IO_PHYS,
44 size: CFG_PCI1_IO_SIZE,
48 bus_start: CFG_PCI1_MMIO_BASE,
49 phys_start: CFG_PCI1_MMIO_PHYS,
50 size: CFG_PCI1_MMIO_SIZE,
55 #ifdef CONFIG_MPC83XX_PCI2
56 static struct pci_region pci2_regions[] = {
58 bus_start: CFG_PCI2_MEM_BASE,
59 phys_start: CFG_PCI2_MEM_PHYS,
60 size: CFG_PCI2_MEM_SIZE,
61 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
64 bus_start: CFG_PCI2_IO_BASE,
65 phys_start: CFG_PCI2_IO_PHYS,
66 size: CFG_PCI2_IO_SIZE,
70 bus_start: CFG_PCI2_MMIO_BASE,
71 phys_start: CFG_PCI2_MMIO_PHYS,
72 size: CFG_PCI2_MMIO_SIZE,
80 u8 val8, orig_i2c_bus;
82 * Assign PIB PMC slot to desired PCI bus
84 /* Switch temporarily to I2C bus #2 */
85 orig_i2c_bus = i2c_get_bus_num();
89 i2c_write(0x23, 0x6, 1, &val8, 1);
90 i2c_write(0x23, 0x7, 1, &val8, 1);
92 i2c_write(0x23, 0x2, 1, &val8, 1);
93 i2c_write(0x23, 0x3, 1, &val8, 1);
96 i2c_write(0x26, 0x6, 1, &val8, 1);
98 i2c_write(0x26, 0x7, 1, &val8, 1);
99 #if defined(PCI_64BIT)
100 val8 = 0xf4; /* PMC2:PCI1/64-bit */
101 #elif defined(PCI_ALL_PCI1)
102 val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
103 #elif defined(PCI_ONE_PCI1)
104 val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
106 val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
108 i2c_write(0x26, 0x2, 1, &val8, 1);
110 i2c_write(0x26, 0x3, 1, &val8, 1);
112 i2c_write(0x27, 0x6, 1, &val8, 1);
113 i2c_write(0x27, 0x7, 1, &val8, 1);
115 i2c_write(0x27, 0x2, 1, &val8, 1);
117 i2c_write(0x27, 0x3, 1, &val8, 1);
120 #if defined(PCI_64BIT)
121 printf("PCI1: 64-bit on PMC2\n");
122 #elif defined(PCI_ALL_PCI1)
123 printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
124 #elif defined(PCI_ONE_PCI1)
125 printf("PCI1: 32-bit on PMC1\n");
126 printf("PCI2: 32-bit on PMC2, PMC3\n");
128 printf("PCI1: 32-bit on PMC1, PMC2\n");
129 printf("PCI2: 32-bit on PMC3\n");
131 /* Reset to original I2C bus */
132 i2c_set_bus_num(orig_i2c_bus);
135 void pci_init_board(void)
137 volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
138 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
139 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
140 #ifndef CONFIG_MPC83XX_PCI2
141 struct pci_region *reg[] = { pci1_regions };
143 struct pci_region *reg[] = { pci1_regions, pci2_regions };
146 /* initialize the PCA9555PW IO expander on the PIB board */
149 /* Enable all 8 PCI_CLK_OUTPUTS */
150 clk->occr = 0xff000000;
153 /* Configure PCI Local Access Windows */
154 pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
155 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
157 pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
158 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
162 #ifndef CONFIG_MPC83XX_PCI2
163 mpc83xx_pci_init(1, reg, 0);
165 mpc83xx_pci_init(2, reg, 0);
169 #endif /* CONFIG_PCI */