2 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/fsl_i2c.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 static struct pci_region pci1_regions[] = {
36 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
37 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
38 size: CONFIG_SYS_PCI1_MEM_SIZE,
39 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
42 bus_start: CONFIG_SYS_PCI1_IO_BASE,
43 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
44 size: CONFIG_SYS_PCI1_IO_SIZE,
48 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
49 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
50 size: CONFIG_SYS_PCI1_MMIO_SIZE,
55 #ifdef CONFIG_MPC83XX_PCI2
56 static struct pci_region pci2_regions[] = {
58 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
59 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
60 size: CONFIG_SYS_PCI2_MEM_SIZE,
61 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
64 bus_start: CONFIG_SYS_PCI2_IO_BASE,
65 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
66 size: CONFIG_SYS_PCI2_IO_SIZE,
70 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
71 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
72 size: CONFIG_SYS_PCI2_MMIO_SIZE,
78 #ifndef CONFIG_PCISLAVE
81 u8 val8, orig_i2c_bus;
83 * Assign PIB PMC slot to desired PCI bus
85 /* Switch temporarily to I2C bus #2 */
86 orig_i2c_bus = i2c_get_bus_num();
90 i2c_write(0x23, 0x6, 1, &val8, 1);
91 i2c_write(0x23, 0x7, 1, &val8, 1);
93 i2c_write(0x23, 0x2, 1, &val8, 1);
94 i2c_write(0x23, 0x3, 1, &val8, 1);
97 i2c_write(0x26, 0x6, 1, &val8, 1);
99 i2c_write(0x26, 0x7, 1, &val8, 1);
100 #if defined(PCI_64BIT)
101 val8 = 0xf4; /* PMC2:PCI1/64-bit */
102 #elif defined(PCI_ALL_PCI1)
103 val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
104 #elif defined(PCI_ONE_PCI1)
105 val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
107 val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
109 i2c_write(0x26, 0x2, 1, &val8, 1);
111 i2c_write(0x26, 0x3, 1, &val8, 1);
113 i2c_write(0x27, 0x6, 1, &val8, 1);
114 i2c_write(0x27, 0x7, 1, &val8, 1);
116 i2c_write(0x27, 0x2, 1, &val8, 1);
118 i2c_write(0x27, 0x3, 1, &val8, 1);
121 #if defined(PCI_64BIT)
122 printf("PCI1: 64-bit on PMC2\n");
123 #elif defined(PCI_ALL_PCI1)
124 printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
125 #elif defined(PCI_ONE_PCI1)
126 printf("PCI1: 32-bit on PMC1\n");
127 printf("PCI2: 32-bit on PMC2, PMC3\n");
129 printf("PCI1: 32-bit on PMC1, PMC2\n");
130 printf("PCI2: 32-bit on PMC3\n");
132 /* Reset to original I2C bus */
133 i2c_set_bus_num(orig_i2c_bus);
136 void pci_init_board(void)
138 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
139 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
140 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
141 #ifndef CONFIG_MPC83XX_PCI2
142 struct pci_region *reg[] = { pci1_regions };
144 struct pci_region *reg[] = { pci1_regions, pci2_regions };
147 /* initialize the PCA9555PW IO expander on the PIB board */
150 /* Enable all 8 PCI_CLK_OUTPUTS */
151 clk->occr = 0xff000000;
154 /* Configure PCI Local Access Windows */
155 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
156 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
158 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
159 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
163 #ifndef CONFIG_MPC83XX_PCI2
164 mpc83xx_pci_init(1, reg);
166 mpc83xx_pci_init(2, reg);
171 void pci_init_board(void)
173 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
174 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
175 volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
176 struct pci_region *reg[] = { pci1_regions };
178 /* Configure PCI Local Access Windows */
179 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
180 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
182 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
183 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
185 mpc83xx_pci_init(1, reg);
187 /* Configure PCI Inbound Translation Windows (3 1MB windows) */
188 pci_ctrl->pitar0 = 0x0;
189 pci_ctrl->pibar0 = 0x0;
190 pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
191 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
193 pci_ctrl->pitar1 = 0x0;
194 pci_ctrl->pibar1 = 0x0;
195 pci_ctrl->piebar1 = 0x0;
196 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
197 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
199 pci_ctrl->pitar2 = 0x0;
200 pci_ctrl->pibar2 = 0x0;
201 pci_ctrl->piebar2 = 0x0;
202 pci_ctrl->piwar2 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
203 PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
205 /* Unlock the configuration bit */
206 mpc83xx_pcislave_unlock(0);
207 printf("PCI: Agent mode enabled\n");
209 #endif /* CONFIG_PCISLAVE */