2 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
14 * PCI Configuration space access support for MPC83xx PCI Bridge
23 #include <asm/fsl_i2c.h>
24 #include "../common/pq-mds-pib.h"
26 DECLARE_GLOBAL_DATA_PTR;
28 static struct pci_region pci1_regions[] = {
30 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
31 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
32 size: CONFIG_SYS_PCI1_MEM_SIZE,
33 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
36 bus_start: CONFIG_SYS_PCI1_IO_BASE,
37 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
38 size: CONFIG_SYS_PCI1_IO_SIZE,
42 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
43 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
44 size: CONFIG_SYS_PCI1_MMIO_SIZE,
49 #ifdef CONFIG_MPC83XX_PCI2
50 static struct pci_region pci2_regions[] = {
52 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
53 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
54 size: CONFIG_SYS_PCI2_MEM_SIZE,
55 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
58 bus_start: CONFIG_SYS_PCI2_IO_BASE,
59 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
60 size: CONFIG_SYS_PCI2_IO_SIZE,
64 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
65 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
66 size: CONFIG_SYS_PCI2_MMIO_SIZE,
72 void pci_init_board(void)
73 #ifdef CONFIG_PCISLAVE
75 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
76 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
77 volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
78 struct pci_region *reg[] = { pci1_regions };
80 /* Configure PCI Local Access Windows */
81 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
82 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
84 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
85 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
87 mpc83xx_pci_init(1, reg);
90 * Configure PCI Inbound Translation Windows
92 pci_ctrl[0].pitar0 = 0x0;
93 pci_ctrl[0].pibar0 = 0x0;
94 pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
95 PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
97 pci_ctrl[0].pitar1 = 0x0;
98 pci_ctrl[0].pibar1 = 0x0;
99 pci_ctrl[0].piebar1 = 0x0;
100 pci_ctrl[0].piwar1 &= ~PIWAR_EN;
102 pci_ctrl[0].pitar2 = 0x0;
103 pci_ctrl[0].pibar2 = 0x0;
104 pci_ctrl[0].piebar2 = 0x0;
105 pci_ctrl[0].piwar2 &= ~PIWAR_EN;
107 /* Unlock the configuration bit */
108 mpc83xx_pcislave_unlock(0);
109 printf("PCI: Agent mode enabled\n");
113 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
114 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
115 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
116 #ifndef CONFIG_MPC83XX_PCI2
117 struct pci_region *reg[] = { pci1_regions };
119 struct pci_region *reg[] = { pci1_regions, pci2_regions };
122 /* initialize the PCA9555PW IO expander on the PIB board */
126 clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
127 printf("PCI clock is 66MHz\n");
128 #elif defined(PCI_33M)
129 clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
130 OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
131 printf("PCI clock is 33MHz\n");
133 clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
134 printf("PCI clock is 66MHz\n");
138 /* Configure PCI Local Access Windows */
139 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
140 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
142 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
143 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
147 #ifndef CONFIG_MPC83XX_PCI2
148 mpc83xx_pci_init(1, reg);
150 mpc83xx_pci_init(2, reg);
153 #endif /* CONFIG_PCISLAVE */