2 * Copyright (C) 2007 Freescale Semiconductor, Inc.
3 * Kevin Lam <kevin.lam@freescale.com>
4 * Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
18 #include <asm/fsl_serdes.h>
19 #include <fdt_support.h>
20 #include <spd_sdram.h>
23 #if defined(CFG_DRAM_TEST)
27 uint *pstart = (uint *) CFG_MEMTEST_START;
28 uint *pend = (uint *) CFG_MEMTEST_END;
31 printf("Testing DRAM from 0x%08x to 0x%08x\n",
35 printf("DRAM test phase 1:\n");
36 for (p = pstart; p < pend; p++)
39 for (p = pstart; p < pend; p++) {
40 if (*p != 0xaaaaaaaa) {
41 printf("DRAM test fails at: %08x\n", (uint) p);
46 printf("DRAM test phase 2:\n");
47 for (p = pstart; p < pend; p++)
50 for (p = pstart; p < pend; p++) {
51 if (*p != 0x55555555) {
52 printf("DRAM test fails at: %08x\n", (uint) p);
57 printf("DRAM test passed.\n");
62 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
63 void ddr_enable_ecc(unsigned int dram_size);
65 int fixed_sdram(void);
67 phys_size_t initdram(int board_type)
69 immap_t *im = (immap_t *) CFG_IMMR;
72 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
75 #if defined(CONFIG_SPD_EEPROM)
78 msize = fixed_sdram();
81 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
82 /* Initialize DDR ECC byte */
83 ddr_enable_ecc(msize * 1024 * 1024);
85 /* return total bus DDR size(bytes) */
86 return (msize * 1024 * 1024);
89 #if !defined(CONFIG_SPD_EEPROM)
90 /*************************************************************************
91 * fixed sdram init -- doesn't use serial presence detect.
92 ************************************************************************/
95 immap_t *im = (immap_t *) CFG_IMMR;
96 u32 msize = CFG_DDR_SIZE * 1024 * 1024;
97 u32 msize_log2 = __ilog2(msize);
99 im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
100 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
102 im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
105 im->ddr.sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL;
108 im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
109 im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
112 im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
113 im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
114 im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
115 im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
116 im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
117 im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
118 im->ddr.sdram_mode = CFG_DDR_MODE;
119 im->ddr.sdram_mode2 = CFG_DDR_MODE2;
120 im->ddr.sdram_interval = CFG_DDR_INTERVAL;
124 im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
128 #endif /*!CFG_SPD_EEPROM */
132 puts("Board: Freescale MPC837xERDB\n");
136 int board_early_init_f(void)
138 #ifdef CONFIG_FSL_SERDES
139 immap_t *immr = (immap_t *)CFG_IMMR;
140 u32 spridr = in_be32(&immr->sysconf.spridr);
142 /* we check only part num, and don't look for CPU revisions */
143 switch (PARTID_NO_E(spridr)) {
145 fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
146 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
147 fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
148 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
151 fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
152 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
155 fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
156 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
157 fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
158 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
161 printf("serdes not configured: unknown CPU part number: "
162 "%04x\n", spridr >> 16);
165 #endif /* CONFIG_FSL_SERDES */
170 * Miscellaneous late-boot configurations
172 * If a VSC7385 microcode image is present, then upload it.
174 int misc_init_r(void)
178 #ifdef CONFIG_VSC7385_IMAGE
179 if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
180 CONFIG_VSC7385_IMAGE_SIZE)) {
181 puts("Failure uploading VSC7385 microcode.\n");
189 #if defined(CONFIG_OF_BOARD_SETUP)
191 void ft_board_setup(void *blob, bd_t *bd)
194 ft_pci_setup(blob, bd);
196 ft_cpu_setup(blob, bd);
197 fdt_fixup_dr_usb(blob, bd);
199 #endif /* CONFIG_OF_BOARD_SETUP */