2 * Copyright 2007 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
26 #include <asm/immap_85xx.h>
30 #include "../common/pixis.h"
32 #if defined(CONFIG_OF_FLAT_TREE)
34 extern void ft_cpu_setup(void *blob, bd_t *bd);
37 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
38 extern void ddr_enable_ecc(unsigned int dram_size);
41 extern long int spd_sdram(void);
43 void sdram_init(void);
45 int board_early_init_f (void)
52 volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
53 volatile ccsr_gur_t *gur = &immap->im_gur;
55 if ((uint)&gur->porpllsr != 0xe00e0000) {
56 printf("immap size error %x\n",&gur->porpllsr);
58 printf ("Board: MPC8544DS\n");
64 initdram(int board_type)
68 puts("Initializing\n");
70 dram_size = spd_sdram();
72 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
74 * Initialize and enable DDR ECC.
76 ddr_enable_ecc(dram_size);
83 #if defined(CFG_DRAM_TEST)
87 uint *pstart = (uint *) CFG_MEMTEST_START;
88 uint *pend = (uint *) CFG_MEMTEST_END;
91 printf("Testing DRAM from 0x%08x to 0x%08x\n",
95 printf("DRAM test phase 1:\n");
96 for (p = pstart; p < pend; p++)
99 for (p = pstart; p < pend; p++) {
100 if (*p != 0xaaaaaaaa) {
101 printf ("DRAM test fails at: %08x\n", (uint) p);
106 printf("DRAM test phase 2:\n");
107 for (p = pstart; p < pend; p++)
110 for (p = pstart; p < pend; p++) {
111 if (*p != 0x55555555) {
112 printf ("DRAM test fails at: %08x\n", (uint) p);
117 printf("DRAM test passed.\n");
124 int last_stage_init(void)
131 get_board_sys_clk(ulong dummy)
133 u8 i, go_bit, rd_clks;
136 go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
139 rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
143 * Only if both go bit and the SCLK bit in VCFGEN0 are set
144 * should we be using the AUX register. Remember, we also set the
145 * GO bit to boot from the alternate bank on the on-board flash
150 i = in8(PIXIS_BASE + PIXIS_AUX);
152 i = in8(PIXIS_BASE + PIXIS_SPD);
154 i = in8(PIXIS_BASE + PIXIS_SPD);
189 #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
191 ft_board_setup(void *blob, bd_t *bd)
196 ft_cpu_setup(blob, bd);
198 p = ft_get_prop(blob, "/memory/reg", &len);
200 *p++ = cpu_to_be32(bd->bi_memstart);
201 *p = cpu_to_be32(bd->bi_memsize);