2 * Copyright 2009 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
11 #include <asm/fsl_ddr_sdram.h>
12 #include <asm/fsl_ddr_dimm_params.h>
14 void fsl_ddr_board_options(memctl_options_t *popts,
16 unsigned int ctrl_num)
19 * Factors to consider for clock adjust:
20 * - number of chips on bus
25 * This needs to be determined on a board-by-board basis.
29 popts->clk_adjust = 4;
32 * Factors to consider for CPO:
36 popts->cpo_override = 0xff;
39 * Factors to consider for write data delay:
49 popts->write_data_delay = 2;
52 * Enable half drive strength
54 popts->half_strength_driver_enable = 1;
56 /* Write leveling override */
58 popts->wrlvl_override = 1;
59 popts->wrlvl_sample = 0xa;
60 popts->wrlvl_start = 0x4;
62 /* Rtt and Rtt_W override */
63 popts->rtt_override = 1;
64 popts->rtt_override_value = DDR3_RTT_60_OHM;
65 popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */