git.sur5r.net Git - u-boot/blob - board/freescale/mpc8641hpcn/ddr.c

   1 /*
   2  * Copyright 2008,2011 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #include <common.h>
   8
   9 #include <fsl_ddr_sdram.h>
  10 #include <fsl_ddr_dimm_params.h>
  11
  12 struct board_specific_parameters {
  13         u32 n_ranks;
  14         u32 datarate_mhz_high;
  15         u32 clk_adjust;
  16         u32 cpo;
  17         u32 write_data_delay;
  18 };
  19
  20 /*
  21  * This table contains all valid speeds we want to override with board
  22  * specific parameters. datarate_mhz_high values need to be in ascending order
  23  * for each n_ranks group.
  24  */
  25 const struct board_specific_parameters dimm0[] = {
  26         /*
  27          * memory controller 0
  28          *   num|  hi|  clk| cpo|wrdata|2T
  29          * ranks| mhz|adjst|    | delay|
  30          */
  31         {4,  333,    7,   7,     3},
  32         {4,  549,    7,   9,     3},
  33         {4,  650,    7,  10,     4},
  34         {2,  333,    7,   7,     3},
  35         {2,  549,    7,   9,     3},
  36         {2,  650,    7,  10,     4},
  37         {1,  333,    7,   7,     3},
  38         {1,  549,    7,   9,     3},
  39         {1,  650,    7,  10,     4},
  40         {}
  41 };
  42
  43 /*
  44  * The two slots have slightly different timing. The center values are good
  45  * for both slots. We use identical speed tables for them. In future use, if
  46  * DIMMs have fewer center values that require two separated tables, copy the
  47  * udimm0 table to udimm1 and make changes to clk_adjust and wrlvl_start.
  48  */
  49 const struct board_specific_parameters *dimms[] = {
  50         dimm0,
  51         dimm0,
  52 };
  53
  54 void fsl_ddr_board_options(memctl_options_t *popts,
  55                         dimm_params_t *pdimm,
  56                         unsigned int ctrl_num)
  57 {
  58         const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
  59         unsigned int i;
  60         ulong ddr_freq;
  61
  62         if (ctrl_num > 1) {
  63                 printf("Wrong parameter for controller number %d", ctrl_num);
  64                 return;
  65         }
  66         for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
  67                 if (pdimm[i].n_ranks)
  68                         break;
  69         }
  70         if (i >= CONFIG_DIMM_SLOTS_PER_CTLR)    /* no DIMM */
  71                 return;
  72
  73         pbsp = dimms[ctrl_num];
  74
  75         /* Get clk_adjust, cpo, write_data_delay, according to the board ddr
  76          * freqency and n_banks specified in board_specific_parameters table.
  77          */
  78         ddr_freq = get_ddr_freq(0) / 1000000;
  79         while (pbsp->datarate_mhz_high) {
  80                 if (pbsp->n_ranks == pdimm[i].n_ranks) {
  81                         if (ddr_freq <= pbsp->datarate_mhz_high) {
  82                                 popts->clk_adjust = pbsp->clk_adjust;
  83                                 popts->cpo_override = pbsp->cpo;
  84                                 popts->write_data_delay =
  85                                         pbsp->write_data_delay;
  86                                 goto found;
  87                         }
  88                         pbsp_highest = pbsp;
  89                 }
  90                 pbsp++;
  91         }
  92
  93         if (pbsp_highest) {
  94                 printf("Error: board specific timing not found "
  95                         "for data rate %lu MT/s!\n"
  96                         "Trying to use the highest speed (%u) parameters\n",
  97                         ddr_freq, pbsp_highest->datarate_mhz_high);
  98                 popts->clk_adjust = pbsp_highest->clk_adjust;
  99                 popts->cpo_override = pbsp_highest->cpo;
 100                 popts->write_data_delay = pbsp_highest->write_data_delay;
 101         } else {
 102                 panic("DIMM is not supported by this board");
 103         }
 104
 105 found:
 106         /* 2T timing enable */
 107         popts->twot_en = 1;
 108 }