2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
15 * Boot Device : one of
16 * spi/sd/nand/onenand, qspi/nor
22 * Device Configuration Data (DCD)
24 * Each entry must have the format:
25 * Addr-type Address Value
28 * Addr-type register length (1,2 or 4 bytes)
29 * Address absolute address of the register
30 * value value to be stored in the register
33 /* Enable all clocks */
34 DATA 4 0x020c4068 0xffffffff
35 DATA 4 0x020c406c 0xffffffff
36 DATA 4 0x020c4070 0xffffffff
37 DATA 4 0x020c4074 0xffffffff
38 DATA 4 0x020c4078 0xffffffff
39 DATA 4 0x020c407c 0xffffffff
40 DATA 4 0x020c4080 0xffffffff
41 DATA 4 0x020c4084 0xffffffff
43 /* IOMUX - DDR IO Type */
44 DATA 4 0x020e0618 0x000c0000
45 DATA 4 0x020e05fc 0x00000000
48 DATA 4 0x020e032c 0x00000030
51 DATA 4 0x020e0300 0x00000030
52 DATA 4 0x020e02fc 0x00000030
53 DATA 4 0x020e05f4 0x00000030
56 DATA 4 0x020e0340 0x00000030
58 DATA 4 0x020e0320 0x00000000
59 DATA 4 0x020e0310 0x00000030
60 DATA 4 0x020e0314 0x00000030
61 DATA 4 0x020e0614 0x00000030
64 DATA 4 0x020e05f8 0x00020000
65 DATA 4 0x020e0330 0x00000030
66 DATA 4 0x020e0334 0x00000030
67 DATA 4 0x020e0338 0x00000030
68 DATA 4 0x020e033c 0x00000030
71 DATA 4 0x020e0608 0x00020000
72 DATA 4 0x020e060c 0x00000030
73 DATA 4 0x020e0610 0x00000030
74 DATA 4 0x020e061c 0x00000030
75 DATA 4 0x020e0620 0x00000030
76 DATA 4 0x020e02ec 0x00000030
77 DATA 4 0x020e02f0 0x00000030
78 DATA 4 0x020e02f4 0x00000030
79 DATA 4 0x020e02f8 0x00000030
81 /* Calibrations - ZQ */
82 DATA 4 0x021b0800 0xa1390003
85 DATA 4 0x021b080c 0x002C003D
86 DATA 4 0x021b0810 0x00110046
89 DATA 4 0x021b083c 0x4160016C
90 DATA 4 0x021b0840 0x013C016C
92 /* Read/Write Delay */
93 DATA 4 0x021b0848 0x46424446
94 DATA 4 0x021b0850 0x3A3C3C3A
96 DATA 4 0x021b08c0 0x2492244A
98 /* read data bit delay */
99 DATA 4 0x021b081c 0x33333333
100 DATA 4 0x021b0820 0x33333333
101 DATA 4 0x021b0824 0x33333333
102 DATA 4 0x021b0828 0x33333333
104 /* Complete calibration by forced measurement */
105 DATA 4 0x021b08b8 0x00000800
107 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
108 DATA 4 0x021b0004 0x0002002d
109 DATA 4 0x021b0008 0x00333030
110 DATA 4 0x021b000c 0x676b52f3
111 DATA 4 0x021b0010 0xb66d8b63
112 DATA 4 0x021b0014 0x01ff00db
113 DATA 4 0x021b0018 0x00011740
114 DATA 4 0x021b001c 0x00008000
115 DATA 4 0x021b002c 0x000026d2
116 DATA 4 0x021b0030 0x006b1023
117 DATA 4 0x021b0040 0x0000007f
118 DATA 4 0x021b0000 0x85190000
120 /* Initialize MT41K256M16HA-125 - MR2 */
121 DATA 4 0x021b001c 0x04008032
123 DATA 4 0x021b001c 0x00008033
125 DATA 4 0x021b001c 0x00068031
127 DATA 4 0x021b001c 0x05208030
128 /* DDR device ZQ calibration */
129 DATA 4 0x021b001c 0x04008040
131 /* Final DDR setup, before operation start */
132 DATA 4 0x021b0020 0x00000800
133 DATA 4 0x021b0818 0x00022227
134 DATA 4 0x021b0004 0x0002556d
135 DATA 4 0x021b0404 0x00011006
136 DATA 4 0x021b001c 0x00000000