2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
27 #include <asm/cache.h>
28 #include <asm/immap_85xx.h>
29 #include <asm/fsl_serdes.h>
33 #include <fdt_support.h>
39 DECLARE_GLOBAL_DATA_PTR;
41 #define VSC7385_RST_SET 0x00080000
42 #define SLIC_RST_SET 0x00040000
43 #define SGMII_PHY_RST_SET 0x00020000
44 #define PCIE_RST_SET 0x00010000
45 #define RGMII_PHY_RST_SET 0x02000000
47 #define USB_RST_CLR 0x04000000
49 #define GPIO_DIR 0x060f0000
51 #define BOARD_PERI_RST_SET VSC7385_RST_SET | SLIC_RST_SET | \
52 SGMII_PHY_RST_SET | PCIE_RST_SET | \
55 #define SYSCLK_MASK 0x00200000
56 #define BOARDREV_MASK 0x10100000
57 #define BOARDREV_B 0x10100000
58 #define BOARDREV_C 0x00100000
59 #define BOARDREV_D 0x00000000
61 #define SYSCLK_66 66666666
62 #define SYSCLK_50 50000000
63 #define SYSCLK_100 100000000
65 unsigned long get_board_sys_clk(ulong dummy)
67 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
68 u32 val_gpdat, sysclk_gpio, board_rev_gpio;
70 val_gpdat = in_be32(&pgpio->gpdat);
71 sysclk_gpio = val_gpdat & SYSCLK_MASK;
72 board_rev_gpio = val_gpdat & BOARDREV_MASK;
73 if (board_rev_gpio == BOARDREV_C) {
78 } else if (board_rev_gpio == BOARDREV_B) {
83 } else if (board_rev_gpio == BOARDREV_D) {
93 int board_early_init_f (void)
95 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
97 setbits_be32(&gur->pmuxcr,
98 (MPC85xx_PMUXCR_SDHC_CD |
99 MPC85xx_PMUXCR_SDHC_WP));
104 int checkboard (void)
106 u32 val_gpdat, board_rev_gpio;
107 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
109 struct cpu_type *cpu;
111 val_gpdat = in_be32(&pgpio->gpdat);
112 board_rev_gpio = val_gpdat & BOARDREV_MASK;
113 if (board_rev_gpio == BOARDREV_C)
115 else if (board_rev_gpio == BOARDREV_B)
117 else if (board_rev_gpio == BOARDREV_D)
120 panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
123 printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
124 setbits_be32(&pgpio->gpdir, GPIO_DIR);
127 * Bringing the following peripherals out of reset via GPIOs
128 * 0 = reset and 1 = out of reset
129 * GPIO12 - Reset to Ethernet Switch
130 * GPIO13 - Reset to SLIC/SLAC devices
131 * GPIO14 - Reset to SGMII_PHY_N
132 * GPIO15 - Reset to PCIe slots
133 * GPIO6 - Reset to RGMII PHY
134 * GPIO5 - Reset to USB3300 devices 1 = reset and 0 = out of reset
136 clrsetbits_be32(&pgpio->gpdat, USB_RST_CLR, BOARD_PERI_RST_SET);
141 int board_early_init_r(void)
143 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
144 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
147 * Remap Boot flash region to caching-inhibited
148 * so that flash can be erased properly.
151 /* Flush d-cache and invalidate i-cache of any FLASH data */
155 /* invalidate existing TLB entry for flash */
156 disable_tlb(flash_esel);
158 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
159 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
160 0, flash_esel, BOOKE_PAGESZ_16M, 1);
166 #ifdef CONFIG_TSEC_ENET
167 int board_eth_init(bd_t *bis)
169 struct tsec_info_struct tsec_info[4];
172 unsigned int vscfw_addr;
175 SET_STD_TSEC_INFO(tsec_info[num], 1);
179 SET_STD_TSEC_INFO(tsec_info[num], 2);
183 SET_STD_TSEC_INFO(tsec_info[num], 3);
184 if (is_serdes_configured(SGMII_TSEC3)) {
185 puts("eTSEC3 is in sgmii mode.\n");
186 tsec_info[num].flags |= TSEC_SGMII;
191 printf("No TSECs initialized\n");
194 #ifdef CONFIG_VSC7385_ENET
195 /* If a VSC7385 microcode image is present, then upload it. */
196 if ((tmp = getenv ("vscfw_addr")) != NULL) {
197 vscfw_addr = simple_strtoul (tmp, NULL, 16);
198 printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
199 if (vsc7385_upload_firmware((void *) vscfw_addr,
200 CONFIG_VSC7385_IMAGE_SIZE))
201 puts("Failure uploading VSC7385 microcode.\n");
203 puts("No address specified for VSC7385 microcode.\n");
206 tsec_eth_init(bis, tsec_info, num);
208 return pci_eth_init(bis);
212 #if defined(CONFIG_OF_BOARD_SETUP)
213 extern void ft_pci_board_setup(void *blob);
215 void ft_board_setup(void *blob, bd_t *bd)
220 ft_cpu_setup(blob, bd);
222 base = getenv_bootm_low();
223 size = getenv_bootm_size();
225 #if defined(CONFIG_PCI)
226 ft_pci_board_setup(blob);
227 #endif /* #if defined(CONFIG_PCI) */
229 fdt_fixup_memory(blob, (u64)base, (u64)size);