2 * Copyright 2009 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
27 #include <asm/cache.h>
28 #include <asm/immap_85xx.h>
32 #include <fdt_support.h>
37 DECLARE_GLOBAL_DATA_PTR;
39 #define VSC7385_RST_SET 0x00080000
40 #define SLIC_RST_SET 0x00040000
41 #define SGMII_PHY_RST_SET 0x00020000
42 #define PCIE_RST_SET 0x00010000
43 #define RGMII_PHY_RST_SET 0x02000000
45 #define USB_RST_CLR 0x04000000
47 #define GPIO_DIR 0x060f0000
49 #define BOARD_PERI_RST_SET VSC7385_RST_SET | SLIC_RST_SET | \
50 SGMII_PHY_RST_SET | PCIE_RST_SET | \
53 #define SYSCLK_MASK 0x00200000
54 #define BOARDREV_MASK 0x10100000
55 #define BOARDREV_B 0x10100000
56 #define BOARDREV_C 0x00100000
57 #define BOARDREV_D 0x00000000
59 #define SYSCLK_66 66666666
60 #define SYSCLK_50 50000000
61 #define SYSCLK_100 100000000
63 unsigned long get_board_sys_clk(ulong dummy)
65 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
66 u32 val_gpdat, sysclk_gpio, board_rev_gpio;
68 val_gpdat = in_be32(&pgpio->gpdat);
69 sysclk_gpio = val_gpdat & SYSCLK_MASK;
70 board_rev_gpio = val_gpdat & BOARDREV_MASK;
71 if (board_rev_gpio == BOARDREV_C) {
76 } else if (board_rev_gpio == BOARDREV_B) {
81 } else if (board_rev_gpio == BOARDREV_D) {
91 int board_early_init_f (void)
93 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
95 setbits_be32(&gur->pmuxcr,
96 (MPC85xx_PMUXCR_SDHC_CD |
97 MPC85xx_PMUXCR_SDHC_WP));
102 int checkboard (void)
104 u32 val_gpdat, board_rev_gpio;
105 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
107 struct cpu_type *cpu;
109 val_gpdat = in_be32(&pgpio->gpdat);
110 board_rev_gpio = val_gpdat & BOARDREV_MASK;
111 if (board_rev_gpio == BOARDREV_C)
113 else if (board_rev_gpio == BOARDREV_B)
115 else if (board_rev_gpio == BOARDREV_D)
118 panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
121 printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
122 setbits_be32(&pgpio->gpdir, GPIO_DIR);
125 * Bringing the following peripherals out of reset via GPIOs
126 * 0 = reset and 1 = out of reset
127 * GPIO12 - Reset to Ethernet Switch
128 * GPIO13 - Reset to SLIC/SLAC devices
129 * GPIO14 - Reset to SGMII_PHY_N
130 * GPIO15 - Reset to PCIe slots
131 * GPIO6 - Reset to RGMII PHY
132 * GPIO5 - Reset to USB3300 devices 1 = reset and 0 = out of reset
134 clrsetbits_be32(&pgpio->gpdat, USB_RST_CLR, BOARD_PERI_RST_SET);
139 int board_early_init_r(void)
141 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
142 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
145 * Remap Boot flash region to caching-inhibited
146 * so that flash can be erased properly.
149 /* Flush d-cache and invalidate i-cache of any FLASH data */
153 /* invalidate existing TLB entry for flash */
154 disable_tlb(flash_esel);
156 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
157 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
158 0, flash_esel, BOOKE_PAGESZ_16M, 1);
163 #ifdef CONFIG_TSEC_ENET
164 int board_eth_init(bd_t *bis)
166 struct tsec_info_struct tsec_info[4];
167 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
171 unsigned int vscfw_addr;
174 SET_STD_TSEC_INFO(tsec_info[num], 1);
178 SET_STD_TSEC_INFO(tsec_info[num], 2);
182 SET_STD_TSEC_INFO(tsec_info[num], 3);
183 pordevsr = in_be32(&gur->pordevsr);
184 if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
185 tsec_info[num].flags |= TSEC_SGMII;
189 printf("No TSECs initialized\n");
192 #ifdef CONFIG_VSC7385_ENET
193 /* If a VSC7385 microcode image is present, then upload it. */
194 if ((tmp = getenv ("vscfw_addr")) != NULL) {
195 vscfw_addr = simple_strtoul (tmp, NULL, 16);
196 printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
197 if (vsc7385_upload_firmware((void *) vscfw_addr,
198 CONFIG_VSC7385_IMAGE_SIZE))
199 puts("Failure uploading VSC7385 microcode.\n");
201 puts("No address specified for VSC7385 microcode.\n");
204 tsec_eth_init(bis, tsec_info, num);
206 return pci_eth_init(bis);
210 #if defined(CONFIG_OF_BOARD_SETUP)
211 extern void ft_pci_board_setup(void *blob);
213 void ft_board_setup(void *blob, bd_t *bd)
218 ft_cpu_setup(blob, bd);
220 base = getenv_bootm_low();
221 size = getenv_bootm_size();
223 ft_pci_board_setup(blob);
225 fdt_fixup_memory(blob, (u64)base, (u64)size);
230 extern void cpu_mp_lmb_reserve(struct lmb *lmb);
232 void board_lmb_reserve(struct lmb *lmb)
234 cpu_mp_lmb_reserve(lmb);