2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <fsl_esdhc.h>
14 #include <spi_flash.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 #define SYSCLK_MASK 0x00200000
19 #define BOARDREV_MASK 0x10100000
21 #define SYSCLK_66 66666666
22 #define SYSCLK_100 100000000
24 unsigned long get_board_sys_clk(ulong dummy)
26 ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
27 u32 val_gpdat, sysclk_gpio;
29 val_gpdat = in_be32(&pgpio->gpdat);
30 sysclk_gpio = val_gpdat & SYSCLK_MASK;
40 phys_size_t get_effective_memsize(void)
42 return CONFIG_SYS_L2_SIZE;
45 void board_init_f(ulong bootflag)
47 u32 plat_ratio, bus_clk;
48 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
52 /* Set pmuxcr to allow both i2c1 and i2c2 */
53 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
54 setbits_be32(&gur->pmuxcr,
55 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
57 /* Read back the register to synchronize the write. */
58 in_be32(&gur->pmuxcr);
60 #ifdef CONFIG_SPL_SPI_BOOT
61 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
64 /* initialize selected port with appropriate baud rate */
65 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
67 bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
68 gd->bus_clk = bus_clk;
70 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
71 bus_clk / 16 / CONFIG_BAUDRATE);
72 #ifdef CONFIG_SPL_MMC_BOOT
73 puts("\nSD boot...\n");
74 #elif defined(CONFIG_SPL_SPI_BOOT)
75 puts("\nSPI Flash boot...\n");
78 /* copy code to RAM and jump to it - this should not return */
79 /* NOTE - code has to be copied out of NAND buffer before
80 * other blocks can be read.
82 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
85 void board_init_r(gd_t *gd, ulong dest_addr)
87 /* Pointer is writable since we allocated a register for it */
88 gd = (gd_t *)CONFIG_SPL_GD_ADDR;
91 memset(gd, 0, sizeof(gd_t));
92 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
93 memset(bd, 0, sizeof(bd_t));
95 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
96 bd->bi_memsize = CONFIG_SYS_L2_SIZE;
100 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
101 CONFIG_SPL_RELOC_MALLOC_SIZE);
103 #ifdef CONFIG_SPL_MMC_BOOT
106 /* relocate environment function pointers etc. */
107 #ifdef CONFIG_SPL_NAND_BOOT
108 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
109 (uchar *)CONFIG_ENV_ADDR);
111 #ifdef CONFIG_SPL_NAND_BOOT
112 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
113 (uchar *)CONFIG_ENV_ADDR);
115 #ifdef CONFIG_SPL_MMC_BOOT
116 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
117 (uchar *)CONFIG_ENV_ADDR);
119 #ifdef CONFIG_SPL_SPI_BOOT
120 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
121 (uchar *)CONFIG_ENV_ADDR);
124 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
127 gd->ram_size = initdram(0);
128 #ifdef CONFIG_SPL_NAND_BOOT
129 puts("Tertiary program loader running in sram...");
131 puts("Second program loader running in sram...\n");
134 #ifdef CONFIG_SPL_MMC_BOOT
136 #elif defined(CONFIG_SPL_SPI_BOOT)
138 #elif defined(CONFIG_SPL_NAND_BOOT)