2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <linux/compiler.h>
28 #include <asm/processor.h>
29 #include <asm/cache.h>
30 #include <asm/immap_85xx.h>
31 #include <asm/fsl_law.h>
32 #include <asm/fsl_serdes.h>
33 #include <asm/fsl_portals.h>
34 #include <asm/fsl_liodn.h>
36 extern void pci_of_setup(void *blob, bd_t *bd);
40 DECLARE_GLOBAL_DATA_PTR;
45 struct cpu_type *cpu = gd->cpu;
46 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
49 printf("Board: %sRDB, ", cpu->name);
50 printf("CPLD version: %d.%d ", CPLD_READ(cpld_ver),
51 CPLD_READ(cpld_ver_sub));
53 sw = CPLD_READ(fbank_sel);
54 printf("vBank: %d\n", sw & 0x1);
56 #ifdef CONFIG_PHYS_64BIT
57 puts("36-bit Addressing\n");
61 * Display the RCW, so that no one gets confused as to what RCW
62 * we're actually using for this boot.
64 puts("Reset Configuration Word (RCW):");
65 for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
66 u32 rcw = in_be32(&gur->rcwsr[i]);
69 printf("\n %08x:", i * 4);
75 * Display the actual SERDES reference clocks as configured by the
76 * dip switches on the board. Note that the SWx registers could
77 * technically be set to force the reference clocks to match the
78 * values that the SERDES expects (or vice versa). For now, however,
79 * we just display both values and hope the user notices when they
82 puts("SERDES Reference Clocks: ");
83 sw = in_8(&CPLD_SW(2)) >> 2;
84 for (i = 0; i < 2; i++) {
85 static const char * const freq[] = {"0", "100", "125"};
86 unsigned int clock = (sw >> (2 * i)) & 3;
88 printf("Bank%u=%sMhz ", i+1, freq[clock]);
95 int board_early_init_f(void)
97 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
99 /* board only uses the DDR_MCK0/1, so disable the DDR_MCK2/3 */
100 setbits_be32(&gur->ddrclkdr, 0x000f000f);
105 int board_early_init_r(void)
107 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
108 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
111 * Remap Boot flash + PROMJET region to caching-inhibited
112 * so that flash can be erased properly.
115 /* Flush d-cache and invalidate i-cache of any FLASH data */
119 /* invalidate existing TLB entry for flash + promjet */
120 disable_tlb(flash_esel);
122 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
123 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
124 0, flash_esel, BOOKE_PAGESZ_256M, 1);
132 static const char *serdes_clock_to_string(u32 clock)
135 case SRDS_PLLCR0_RFCK_SEL_100:
137 case SRDS_PLLCR0_RFCK_SEL_125:
139 case SRDS_PLLCR0_RFCK_SEL_156_25:
146 #define NUM_SRDS_BANKS 2
148 int misc_init_r(void)
150 serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
151 u32 actual[NUM_SRDS_BANKS];
155 sw = in_8(&CPLD_SW(2)) >> 2;
156 for (i = 0; i < NUM_SRDS_BANKS; i++) {
157 unsigned int clock = (sw >> (2 * i)) & 3;
160 actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
163 actual[i] = SRDS_PLLCR0_RFCK_SEL_125;
166 printf("Warning: SDREFCLK%u switch setting of '11' is "
167 "unsupported\n", i + 1);
172 for (i = 0; i < NUM_SRDS_BANKS; i++) {
173 u32 expected = in_be32(®s->bank[i].pllcr0);
174 expected &= SRDS_PLLCR0_RFCK_SEL_MASK;
175 if (expected != actual[i]) {
176 printf("Warning: SERDES bank %u expects reference clock"
177 " %sMHz, but actual is %sMHz\n", i + 1,
178 serdes_clock_to_string(expected),
179 serdes_clock_to_string(actual[i]));
186 void ft_board_setup(void *blob, bd_t *bd)
191 ft_cpu_setup(blob, bd);
193 base = getenv_bootm_low();
194 size = getenv_bootm_size();
196 fdt_fixup_memory(blob, (u64)base, (u64)size);
199 pci_of_setup(blob, bd);
202 fdt_fixup_liodn(blob);