1 /* Copyright 2013 Freescale Semiconductor, Inc.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <fsl_esdhc.h>
14 #include <spi_flash.h>
15 #include "../common/sleep.h"
17 DECLARE_GLOBAL_DATA_PTR;
19 phys_size_t get_effective_memsize(void)
21 return CONFIG_SYS_L3_SIZE;
24 unsigned long get_board_sys_clk(void)
26 return CONFIG_SYS_CLK_FREQ;
29 unsigned long get_board_ddr_clk(void)
31 return CONFIG_DDR_CLK_FREQ;
34 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
35 void board_init_f(ulong bootflag)
37 u32 plat_ratio, sys_clk, uart_clk;
38 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
42 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
44 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
45 if (IS_SVR_REV(svr, 1, 0)) {
47 * There is T1040 SoC issue where NOR, FPGA are inaccessible
48 * during NAND boot because IFC signals > IFC_AD7 are not
49 * enabled. This workaround changes RCW source to make all
52 porsr1 = in_be32(&gur->porsr1);
53 pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK))
55 out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x20000),
60 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
61 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
63 /* Update GD pointer */
64 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
66 #ifdef CONFIG_DEEP_SLEEP
67 /* disable the console if boot from deep sleep */
69 fsl_dp_disable_console();
71 /* compiler optimization barrier needed for GCC >= 3.4 */
72 __asm__ __volatile__("" : : : "memory");
76 /* initialize selected port with appropriate baud rate */
77 sys_clk = get_board_sys_clk();
78 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
79 uart_clk = sys_clk * plat_ratio / 2;
81 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
82 uart_clk / 16 / CONFIG_BAUDRATE);
84 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
87 void board_init_r(gd_t *gd, ulong dest_addr)
91 bd = (bd_t *)(gd + sizeof(gd_t));
92 memset(bd, 0, sizeof(bd_t));
94 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
95 bd->bi_memsize = CONFIG_SYS_L3_SIZE;
99 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
100 CONFIG_SPL_RELOC_MALLOC_SIZE);
101 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
103 #ifdef CONFIG_SPL_MMC_BOOT
107 /* relocate environment function pointers etc. */
108 #ifdef CONFIG_SPL_NAND_BOOT
109 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
110 (uchar *)CONFIG_ENV_ADDR);
112 #ifdef CONFIG_SPL_MMC_BOOT
113 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
114 (uchar *)CONFIG_ENV_ADDR);
116 #ifdef CONFIG_SPL_SPI_BOOT
117 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
118 (uchar *)CONFIG_ENV_ADDR);
120 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
127 gd->ram_size = initdram(0);
129 #ifdef CONFIG_SPL_MMC_BOOT
131 #elif defined(CONFIG_SPL_SPI_BOOT)
133 #elif defined(CONFIG_SPL_NAND_BOOT)